ARM: dts: Configure omap5 OTG ID pin

The ID pin GPIO comes from the PMIC. Let's configure it as a GPIO
for the driver to use, and also make sure the PMIC GPIO pin muxing
is correct. The PMIC pad1 and 2 values for omap5-uevm and igepv5 are
0x5a and 0x1b, we only need to clear bit 2 in pad1 register to make
the ID pin GPIO work.

Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/omap5-board-common.dtsi b/arch/arm/boot/dts/omap5-board-common.dtsi
index cb3247f19b9f416272a869facec19594eff01843..c61eb2063be8e96d008876d1ebbdb382d5ed3815 100644 (file)
--- a/arch/arm/boot/dts/omap5-board-common.dtsi
+++ b/arch/arm/boot/dts/omap5-board-common.dtsi
@@ -393,14 +393,23 @@
                interrupt-controller;
                #interrupt-cells = <2>;
                ti,system-power-controller;
+               ti,mux-pad1 = <0xa1>;
+               ti,mux-pad2 = <0x1b>;
                pinctrl-names = "default";
                pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>;
 
+               palmas_gpio: gpio {
+                       compatible = "ti,palmas-gpio";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+               };
+
                extcon_usb3: palmas_usb {
                        compatible = "ti,palmas-usb-vid";
                        ti,enable-vbus-detection;
                        ti,enable-id-detection;
                        ti,wakeup;
+                       id-gpios = <&palmas_gpio 0 GPIO_ACTIVE_HIGH>;
                };
 
                clk32kgaudio: palmas_clk32k@1 {

diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index 71a8f5492c8b241ecbf4987513751fa92e8ee667..c2ef1285a3dd2f4c605693773d3c663257aca581 100644 (file)
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -863,7 +863,7 @@
                        #size-cells = <1>;
                        utmi-mode = <2>;
                        ranges;
-                       dwc3@4a030000 {
+                       dwc3: dwc3@4a030000 {
                                compatible = "snps,dwc3";
                                reg = <0x4a030000 0x10000>;
                                interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,