perf/x86: Move Nehalem PEBS code to flag

Minor cleanup: use an explicit x86_pmu flag to handle the
missing Lock / TLB information on Nehalem, instead of always
checking the model number for each PEBS sample.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: acme@kernel.org
Cc: jolsa@kernel.org
Link: http://lkml.kernel.org/r/20170816222156.19953-2-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 98b0f072952735da9928970093ac1857bb9a932a..c3439a36dcf93d48b2843f2a04582fac46bb3498 100644 (file)
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3905,6 +3905,7 @@ __init int intel_pmu_init(void)
 
                intel_pmu_pebs_data_source_nhm();
                x86_add_quirk(intel_nehalem_quirk);
+               x86_pmu.pebs_no_tlb = 1;
 
                pr_cont("Nehalem events, ");
                break;

diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index a322fed5f8edcab18401e2745438c362f80e0851..3ccdf8cb4495062de9df8b8a7467a43aa985746f 100644 (file)
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -149,8 +149,6 @@ static u64 load_latency_data(u64 status)
 {
        union intel_x86_pebs_dse dse;
        u64 val;
-       int model = boot_cpu_data.x86_model;
-       int fam = boot_cpu_data.x86;
 
        dse.val = status;
 
@@ -162,8 +160,7 @@ static u64 load_latency_data(u64 status)
        /*
         * Nehalem models do not support TLB, Lock infos
         */
-       if (fam == 0x6 && (model == 26 || model == 30
-           || model == 31 || model == 46)) {
+       if (x86_pmu.pebs_no_tlb) {
                val |= P(TLB, NA) | P(LOCK, NA);
                return val;
        }

diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index 476aec3a4cabd3852be09731a69f6c5f3c28948b..2e9636e4068f728b67ebd5186ee1a79e579798d1 100644 (file)
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -591,7 +591,8 @@ struct x86_pmu {
                        pebs            :1,
                        pebs_active     :1,
                        pebs_broken     :1,
-                       pebs_prec_dist  :1;
+                       pebs_prec_dist  :1,
+                       pebs_no_tlb     :1;
        int             pebs_record_size;
        int             pebs_buffer_size;
        void            (*drain_pebs)(struct pt_regs *regs);