myri10ge: Use PCI Express Capability accessors

Use PCI Express Capability access functions to simplify myri10ge driver.

[bhelgaas: fix myri10ge_toggle_relaxed() return value]
Signed-off-by: Jiang Liu <jiang.liu@huawei.com>
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/drivers/net/ethernet/myricom/myri10ge/myri10ge.c b/drivers/net/ethernet/myricom/myri10ge/myri10ge.c
index fa85cf1353fdabef18d5f64e15e159d2cbed55de..83516e3369c90ceda6449d1a86e9b90f20a9b27c 100644 (file)
--- a/drivers/net/ethernet/myricom/myri10ge/myri10ge.c
+++ b/drivers/net/ethernet/myricom/myri10ge/myri10ge.c
@@ -1078,22 +1078,16 @@ static int myri10ge_reset(struct myri10ge_priv *mgp)
 #ifdef CONFIG_MYRI10GE_DCA
 static int myri10ge_toggle_relaxed(struct pci_dev *pdev, int on)
 {
-       int ret, cap, err;
+       int ret;
        u16 ctl;
 
-       cap = pci_pcie_cap(pdev);
-       if (!cap)
-               return 0;
-
-       err = pci_read_config_word(pdev, cap + PCI_EXP_DEVCTL, &ctl);
-       if (err)
-               return 0;
+       pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &ctl);
 
        ret = (ctl & PCI_EXP_DEVCTL_RELAX_EN) >> 4;
        if (ret != on) {
                ctl &= ~PCI_EXP_DEVCTL_RELAX_EN;
                ctl |= (on << 4);
-               pci_write_config_word(pdev, cap + PCI_EXP_DEVCTL, ctl);
+               pcie_capability_write_word(pdev, PCI_EXP_DEVCTL, ctl);
        }
        return ret;
 }
@@ -3192,18 +3186,13 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
        struct device *dev = &mgp->pdev->dev;
        int cap;
        unsigned err_cap;
-       u16 val;
-       u8 ext_type;
        int ret;
 
        if (!myri10ge_ecrc_enable || !bridge)
                return;
 
        /* check that the bridge is a root port */
-       cap = pci_pcie_cap(bridge);
-       pci_read_config_word(bridge, cap + PCI_CAP_FLAGS, &val);
-       ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
-       if (ext_type != PCI_EXP_TYPE_ROOT_PORT) {
+       if (pci_pcie_type(bridge) != PCI_EXP_TYPE_ROOT_PORT) {
                if (myri10ge_ecrc_enable > 1) {
                        struct pci_dev *prev_bridge, *old_bridge = bridge;
 
@@ -3218,11 +3207,8 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp)
                                                " to force ECRC\n");
                                        return;
                                }
-                               cap = pci_pcie_cap(bridge);
-                               pci_read_config_word(bridge,
-                                                    cap + PCI_CAP_FLAGS, &val);
-                               ext_type = (val & PCI_EXP_FLAGS_TYPE) >> 4;
-                       } while (ext_type != PCI_EXP_TYPE_ROOT_PORT);
+                       } while (pci_pcie_type(bridge) !=
+                                PCI_EXP_TYPE_ROOT_PORT);
 
                        dev_info(dev,
                                 "Forcing ECRC on non-root port %s"
@@ -3335,11 +3321,10 @@ static void myri10ge_select_firmware(struct myri10ge_priv *mgp)
        int overridden = 0;
 
        if (myri10ge_force_firmware == 0) {
-               int link_width, exp_cap;
+               int link_width;
                u16 lnk;
 
-               exp_cap = pci_pcie_cap(mgp->pdev);
-               pci_read_config_word(mgp->pdev, exp_cap + PCI_EXP_LNKSTA, &lnk);
+               pcie_capability_read_word(mgp->pdev, PCI_EXP_LNKSTA, &lnk);
                link_width = (lnk >> 4) & 0x3f;
 
                /* Check to see if Link is less than 8 or if the