[MIPS] Maintain si_code field properly for FP exceptions
authorThiemo Seufer <ths@networkno.de>
Wed, 22 Aug 2007 00:42:04 +0000 (01:42 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 27 Aug 2007 01:16:59 +0000 (02:16 +0100)
The appended patch adds code to update siginfo_t's si_code field. It
fixes e.g. a floating point overflow regression in the SBCL testsuite.

Signed-off-By: Thiemo Seufer <ths@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/traps.c

index d6103e51089997b80f9b4a799b00eb85c8b1f6f3..6379003f9d8d0385d303617c2a1c8d7cf77e3588 100644 (file)
@@ -606,6 +606,8 @@ asmlinkage void do_ov(struct pt_regs *regs)
  */
 asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
 {
+       siginfo_t info;
+
        die_if_kernel("FP exception in kernel code", regs);
 
        if (fcr31 & FPU_CSR_UNI_X) {
@@ -641,9 +643,22 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31)
                        force_sig(sig, current);
 
                return;
-       }
-
-       force_sig(SIGFPE, current);
+       } else if (fcr31 & FPU_CSR_INV_X)
+               info.si_code = FPE_FLTINV;
+       else if (fcr31 & FPU_CSR_DIV_X)
+               info.si_code = FPE_FLTDIV;
+       else if (fcr31 & FPU_CSR_OVF_X)
+               info.si_code = FPE_FLTOVF;
+       else if (fcr31 & FPU_CSR_UDF_X)
+               info.si_code = FPE_FLTUND;
+       else if (fcr31 & FPU_CSR_INE_X)
+               info.si_code = FPE_FLTRES;
+       else
+               info.si_code = __SI_FAULT;
+       info.si_signo = SIGFPE;
+       info.si_errno = 0;
+       info.si_addr = (void __user *) regs->cp0_epc;
+       force_sig_info(SIGFPE, &info, current);
 }
 
 asmlinkage void do_bp(struct pt_regs *regs)