spin_lock_init(&port->lock);
port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
- port->fifosize = 255; /* Should be 512 ! But it can't be */
- /* stored in a unsigned char */
+ port->fifosize = 512;
port->iotype = UPIO_MEM;
port->flags = UPF_BOOT_AUTOCONF |
( uart_console(port) ? 0 : UPF_IOREMAP );
(new_serial.baud_base != port->uartclk / 16) ||
(close_delay != state->close_delay) ||
(closing_wait != state->closing_wait) ||
- (new_serial.xmit_fifo_size != port->fifosize) ||
+ (new_serial.xmit_fifo_size &&
+ new_serial.xmit_fifo_size != port->fifosize) ||
(((new_flags ^ old_flags) & ~UPF_USR_MASK) != 0))
goto exit;
port->flags = ((port->flags & ~UPF_USR_MASK) |
port->custom_divisor = new_serial.custom_divisor;
state->close_delay = close_delay;
state->closing_wait = closing_wait;
- port->fifosize = new_serial.xmit_fifo_size;
+ if (new_serial.xmit_fifo_size)
+ port->fifosize = new_serial.xmit_fifo_size;
if (state->info->tty)
state->info->tty->low_latency =
(port->flags & UPF_LOW_LATENCY) ? 1 : 0;
unsigned char __iomem *membase; /* read/write[bwl] */
unsigned int irq; /* irq number */
unsigned int uartclk; /* base uart clock */
- unsigned char fifosize; /* tx fifo size */
+ unsigned int fifosize; /* tx fifo size */
unsigned char x_char; /* xon/xoff char */
unsigned char regshift; /* reg offset shift */
unsigned char iotype; /* io access style */
+ unsigned char unused1;
#define UPIO_PORT (0)
#define UPIO_HUB6 (1)