usb: dwc3: core: introduce dwc3_core_setup_global_control()

This little helper will be used to setup anything
related to GCTL register. There are no functional
changes, this is a cleanup only patch.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>

diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index 3e9515073e0528f12a8ebf40f506332ad4aca462..e65f30afb89a4bafa7a487dad8b8c92ad09136cb 100644 (file)
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -615,49 +615,10 @@ static bool dwc3_core_is_valid(struct dwc3 *dwc)
        return true;
 }
 
-/**
- * dwc3_core_init - Low-level initialization of DWC3 Core
- * @dwc: Pointer to our controller context structure
- *
- * Returns 0 on success otherwise negative errno.
- */
-static int dwc3_core_init(struct dwc3 *dwc)
+static void dwc3_core_setup_global_control(struct dwc3 *dwc)
 {
-       u32                     hwparams4 = dwc->hwparams.hwparams4;
-       u32                     reg;
-       int                     ret;
-
-       if (!dwc3_core_is_valid(dwc)) {
-               dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n");
-               ret = -ENODEV;
-               goto err0;
-       }
-
-       /*
-        * Write Linux Version Code to our GUID register so it's easy to figure
-        * out which kernel version a bug was found.
-        */
-       dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE);
-
-       /* Handle USB2.0-only core configuration */
-       if (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) ==
-                       DWC3_GHWPARAMS3_SSPHY_IFC_DIS) {
-               if (dwc->maximum_speed == USB_SPEED_SUPER)
-                       dwc->maximum_speed = USB_SPEED_HIGH;
-       }
-
-       /* issue device SoftReset too */
-       ret = dwc3_soft_reset(dwc);
-       if (ret)
-               goto err0;
-
-       ret = dwc3_core_soft_reset(dwc);
-       if (ret)
-               goto err0;
-
-       ret = dwc3_phy_setup(dwc);
-       if (ret)
-               goto err0;
+       u32 hwparams4 = dwc->hwparams.hwparams4;
+       u32 reg;
 
        reg = dwc3_readl(dwc->regs, DWC3_GCTL);
        reg &= ~DWC3_GCTL_SCALEDOWN_MASK;
@@ -726,7 +687,52 @@ static int dwc3_core_init(struct dwc3 *dwc)
                reg |= DWC3_GCTL_U2RSTECN;
 
        dwc3_writel(dwc->regs, DWC3_GCTL, reg);
+}
+
+/**
+ * dwc3_core_init - Low-level initialization of DWC3 Core
+ * @dwc: Pointer to our controller context structure
+ *
+ * Returns 0 on success otherwise negative errno.
+ */
+static int dwc3_core_init(struct dwc3 *dwc)
+{
+       u32                     reg;
+       int                     ret;
+
+       if (!dwc3_core_is_valid(dwc)) {
+               dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n");
+               ret = -ENODEV;
+               goto err0;
+       }
+
+       /*
+        * Write Linux Version Code to our GUID register so it's easy to figure
+        * out which kernel version a bug was found.
+        */
+       dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE);
+
+       /* Handle USB2.0-only core configuration */
+       if (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) ==
+                       DWC3_GHWPARAMS3_SSPHY_IFC_DIS) {
+               if (dwc->maximum_speed == USB_SPEED_SUPER)
+                       dwc->maximum_speed = USB_SPEED_HIGH;
+       }
+
+       /* issue device SoftReset too */
+       ret = dwc3_soft_reset(dwc);
+       if (ret)
+               goto err0;
+
+       ret = dwc3_core_soft_reset(dwc);
+       if (ret)
+               goto err0;
+
+       ret = dwc3_phy_setup(dwc);
+       if (ret)
+               goto err0;
 
+       dwc3_core_setup_global_control(dwc);
        dwc3_core_num_eps(dwc);
 
        ret = dwc3_setup_scratch_buffers(dwc);