spi: fsl-dspi: Set max_speed_hz for master

Calculate and update max speed from bus clock for SoCs
using DSPI IP.

The bus clock factor's are taken from the data sheets
of respective SoCs.

Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c
index 39412c9097c6a240466c51c941ec890a4612542e..559ed70fd229d71f881928a5d16145e5b23193fc 100644 (file)
--- a/drivers/spi/spi-fsl-dspi.c
+++ b/drivers/spi/spi-fsl-dspi.c
@@ -121,18 +121,22 @@ enum dspi_trans_mode {
 
 struct fsl_dspi_devtype_data {
        enum dspi_trans_mode trans_mode;
+       u8 max_clock_factor;
 };
 
 static const struct fsl_dspi_devtype_data vf610_data = {
        .trans_mode = DSPI_EOQ_MODE,
+       .max_clock_factor = 2,
 };
 
 static const struct fsl_dspi_devtype_data ls1021a_v1_data = {
        .trans_mode = DSPI_TCFQ_MODE,
+       .max_clock_factor = 8,
 };
 
 static const struct fsl_dspi_devtype_data ls2085a_data = {
        .trans_mode = DSPI_TCFQ_MODE,
+       .max_clock_factor = 8,
 };
 
 struct fsl_dspi {
@@ -726,6 +730,9 @@ static int dspi_probe(struct platform_device *pdev)
        }
        clk_prepare_enable(dspi->clk);
 
+       master->max_speed_hz =
+               clk_get_rate(dspi->clk) / dspi->devtype_data->max_clock_factor;
+
        init_waitqueue_head(&dspi->waitq);
        platform_set_drvdata(pdev, master);