drm/i915/chv: Register port D encoders and connectors
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 9 Apr 2014 10:28:56 +0000 (13:28 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 20 May 2014 13:33:08 +0000 (15:33 +0200)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Antti Koskipää <antti.koskipaa@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_display.c

index 019a8a34acd2a52c921f9e9bf104edd390e0256f..1ae55fc35e4f7c2b59bf5503effb0b42401a2b9b 100644 (file)
@@ -2457,6 +2457,7 @@ enum punit_power_well {
 #define GEN3_SDVOC     0x61160
 #define GEN4_HDMIB     GEN3_SDVOB
 #define GEN4_HDMIC     GEN3_SDVOC
+#define CHV_HDMID      0x6116C
 #define PCH_SDVOB      0xe1140
 #define PCH_HDMIB      PCH_SDVOB
 #define PCH_HDMIC      0xe1150
index a68dcce6ac3949c030d538c9a54a19b9ed417d33..77a29f33b56f855df236d9f9bdf655d5e3a61edb 100644 (file)
@@ -11053,6 +11053,15 @@ static void intel_setup_outputs(struct drm_device *dev)
                                intel_dp_init(dev, VLV_DISPLAY_BASE + DP_C, PORT_C);
                }
 
+               if (IS_CHERRYVIEW(dev)) {
+                       if (I915_READ(VLV_DISPLAY_BASE + CHV_HDMID) & SDVO_DETECTED) {
+                               intel_hdmi_init(dev, VLV_DISPLAY_BASE + CHV_HDMID,
+                                               PORT_D);
+                               if (I915_READ(VLV_DISPLAY_BASE + DP_D) & DP_DETECTED)
+                                       intel_dp_init(dev, VLV_DISPLAY_BASE + DP_D, PORT_D);
+                       }
+               }
+
                intel_dsi_init(dev);
        } else if (SUPPORTS_DIGITAL_OUTPUTS(dev)) {
                bool found = false;