ASoC: nau8825: Disable short Frame Sync detection logic

If the short Frame Sync detection logic enabled, the logic will check the
short frame sync threshold. If frame sync is less than the setting;
for example, frame sync less than 252 MCLK, the short frame sync signal is
flagged, digital filter temporary mute and skip that data.

If the system was intended for sampling rate change which could create
temporary short frame sync and not enough MIPS to run the digital filter.
But the situation doesn't happen in ALSA architecure. Thus the Frame Sync
is always stable, then no require to do the detection. Therefore,
the dirver disables the function for better performance.

Signed-off-by: John Hsu <KCHSU0@nuvoton.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/sound/soc/codecs/nau8825.c b/sound/soc/codecs/nau8825.c
index e643be91d7620f786803da5647b65932a4137785..0db618b2f2b862830c03460e10f256a12ed0f482 100644 (file)
--- a/sound/soc/codecs/nau8825.c
+++ b/sound/soc/codecs/nau8825.c
@@ -1811,6 +1811,9 @@ static void nau8825_init_regs(struct nau8825 *nau8825)
                NAU8825_DACL_CH_SEL_MASK, NAU8825_DACL_CH_SEL_L);
        regmap_update_bits(nau8825->regmap, NAU8825_REG_DACR_CTRL,
                NAU8825_DACL_CH_SEL_MASK, NAU8825_DACL_CH_SEL_R);
+       /* Disable short Frame Sync detection logic */
+       regmap_update_bits(regmap, NAU8825_REG_LEFT_TIME_SLOT,
+               NAU8825_DIS_FS_SHORT_DET, NAU8825_DIS_FS_SHORT_DET);
 }
 
 static const struct regmap_config nau8825_regmap_config = {

diff --git a/sound/soc/codecs/nau8825.h b/sound/soc/codecs/nau8825.h
index 1c63e2abafa99cddc7f9a2577e0e088803a68214..6365c9c3f8d987abac71101e7e02aac9e707f5f9 100644 (file)
--- a/sound/soc/codecs/nau8825.h
+++ b/sound/soc/codecs/nau8825.h
@@ -246,6 +246,11 @@
 #define NAU8825_I2S_MS_SLAVE   (0 << NAU8825_I2S_MS_SFT)
 #define NAU8825_I2S_BLK_DIV_MASK       0x7
 
+/* LEFT_TIME_SLOT (0x1e) */
+#define NAU8825_FS_ERR_CMP_SEL_SFT     14
+#define NAU8825_FS_ERR_CMP_SEL_MASK    (0x3 << NAU8825_FS_ERR_CMP_SEL_SFT)
+#define NAU8825_DIS_FS_SHORT_DET       (1 << 13)
+
 /* BIQ_CTRL (0x20) */
 #define NAU8825_BIQ_WRT_SFT   4
 #define NAU8825_BIQ_WRT_EN     (1 << NAU8825_BIQ_WRT_SFT)