drm/fsl-dcu: update all registers on flush

Use the UPDATE_MODE READREG bit to initiate a register transfer
on flush. This makes sure that we flush all registers only once
for all planes.

Signed-off-by: Stefan Agner <stefan@agner.ch>

diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
index b2d5e188b1b885708dd02a02021ffa25e5e6dba8..2ea9dbd9be302fe1f251ffe99b8aab5b9bedcbcb 100644 (file)
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
@@ -25,8 +25,13 @@
 static void fsl_dcu_drm_crtc_atomic_flush(struct drm_crtc *crtc,
                                          struct drm_crtc_state *old_crtc_state)
 {
+       struct drm_device *dev = crtc->dev;
+       struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
        struct drm_pending_vblank_event *event = crtc->state->event;
 
+       regmap_write(fsl_dev->regmap,
+                    DCU_UPDATE_MODE, DCU_UPDATE_MODE_READREG);
+
        if (event) {
                crtc->state->event = NULL;
 

diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c
index 9e6f7d8112b32f87e2d34657918589c5ffdfab57..a99f4884742058ab6820b8f9cd5e086326caabb5 100644 (file)
--- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c
+++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c
@@ -160,11 +160,6 @@ static void fsl_dcu_drm_plane_atomic_update(struct drm_plane *plane,
                             DCU_LAYER_POST_SKIP(0) |
                             DCU_LAYER_PRE_SKIP(0));
        }
-       regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
-                          DCU_MODE_DCU_MODE_MASK,
-                          DCU_MODE_DCU_MODE(DCU_MODE_NORMAL));
-       regmap_write(fsl_dev->regmap,
-                    DCU_UPDATE_MODE, DCU_UPDATE_MODE_READREG);
 
        return;
 }