ARM: dts: AM437X: add dpll_clksel_mac_clk node
authorKeerthy <j-keerthy@ti.com>
Thu, 18 Jun 2015 08:01:12 +0000 (13:31 +0530)
committerTero Kristo <t-kristo@ti.com>
Fri, 31 Jul 2015 09:13:18 +0000 (12:13 +0300)
The patch adds the missing dpll_clksel_mac_clk clock node.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
arch/arm/boot/dts/am43xx-clocks.dtsi
drivers/clk/ti/clk-43xx.c

index d0c0dfa4ec486e5927abda3d9f4189435a51d23e..cc88728d751de587bcb86abbe179921c493779e9 100644 (file)
                reg = <0x4238>;
        };
 
+       dpll_clksel_mac_clk: dpll_clksel_mac_clk {
+               #clock-cells = <0>;
+               compatible = "ti,divider-clock";
+               clocks = <&dpll_core_m5_ck>;
+               reg = <0x4234>;
+               ti,bit-shift = <2>;
+               ti,dividers = <2>, <5>;
+       };
+
        clk_32k_mosc_ck: clk_32k_mosc_ck {
                #clock-cells = <0>;
                compatible = "fixed-clock";
index 3795fce8a8303e66a004fe12bcf6d9008a7d5c63..7549b87c41ef2d8777428b73ef8f06ec0486bfa7 100644 (file)
@@ -71,6 +71,7 @@ static struct ti_dt_clk am43xx_clks[] = {
        DT_CLK(NULL, "clk_24mhz", "clk_24mhz"),
        DT_CLK(NULL, "cpsw_125mhz_gclk", "cpsw_125mhz_gclk"),
        DT_CLK(NULL, "cpsw_cpts_rft_clk", "cpsw_cpts_rft_clk"),
+       DT_CLK(NULL, "dpll_clksel_mac_clk", "dpll_clksel_mac_clk"),
        DT_CLK(NULL, "gpio0_dbclk_mux_ck", "gpio0_dbclk_mux_ck"),
        DT_CLK(NULL, "gpio0_dbclk", "gpio0_dbclk"),
        DT_CLK(NULL, "gpio1_dbclk", "gpio1_dbclk"),