vpu: fix mem_pd reg4 mistake for local dimming [1/1]

PD#SWPL-6798

Problem:
vpu mem_pd reg4 config is incorrect

Solution:
fix mem_pd reg4 config

Verify:
ab301

Change-Id: Ibeb732051c2ad4b46e55f66fe05fce440b450263
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>

diff --git a/drivers/amlogic/media/common/vpu/vpu_ctrl.h b/drivers/amlogic/media/common/vpu/vpu_ctrl.h
index 30e39dcb3605b984ad3034d36b5cefaa9c9839b8..2657bc449838abf70cdd110b6a62a651d43bb594 100644 (file)
--- a/drivers/amlogic/media/common/vpu/vpu_ctrl.h
+++ b/drivers/amlogic/media/common/vpu/vpu_ctrl.h
@@ -510,7 +510,9 @@ static struct vpu_ctrl_s vpu_mem_pd_tm2[] = {
        {VPU_TCON,            HHI_VPU_MEM_PD_REG3, 0x3, 16,  16},
        {VPU_AXI_WR1,         HHI_VPU_MEM_PD_REG4, 0x3,  0,   2},
        {VPU_AXI_WR0,         HHI_VPU_MEM_PD_REG4, 0x3,  2,   2},
-       {VPU_DMA,             HHI_VPU_MEM_PD_REG4, 0xf,  4,   4},
+       {VPU_AFBCE,           HHI_VPU_MEM_PD_REG4, 0x3,  4,   2},
+       {VPU_VDIN_WR_MIF2,    HHI_VPU_MEM_PD_REG4, 0x3,  6,   2},
+       {VPU_DMA,             HHI_VPU_MEM_PD_REG4, 0xf,  8,   4},
        {VPU_MOD_MAX,         VPU_REG_END,         0,    0,   0},
 };
 

diff --git a/drivers/amlogic/media/common/vpu/vpu_module.h b/drivers/amlogic/media/common/vpu/vpu_module.h
index 72e1b4fa7c56916fe569404da501031c5bde1fa6..ca2e03d9f8766e2564e6cb7372b2a3a1a08d6f8f 100644 (file)
--- a/drivers/amlogic/media/common/vpu/vpu_module.h
+++ b/drivers/amlogic/media/common/vpu/vpu_module.h
@@ -85,7 +85,8 @@ static char *vpu_mod_table[] = {
        "axi_wr1",
        "axi_wr0",
        "afbce",
-       "dma"
+       "vdin_wr_mif2",
+       "dma",
 
        "vpu_mod_max",
 

diff --git a/include/linux/amlogic/media/vpu/vpu.h b/include/linux/amlogic/media/vpu/vpu.h
index 067b0615d43f968173bb9e3b2b9a01baa4288982..bee9a185aabd3f5b2206bf7241f76a4a1ba23b19 100644 (file)
--- a/include/linux/amlogic/media/vpu/vpu.h
+++ b/include/linux/amlogic/media/vpu/vpu.h
@@ -85,7 +85,8 @@ enum vpu_mod_e {
        VPU_AXI_WR1,          /* reg4[1:0], TL1 */
        VPU_AXI_WR0,          /* reg4[3:2], TL1 */
        VPU_AFBCE,            /* reg4[5:4], TL1 */
-       VPU_DMA,              /* reg4[7:4], TM2 */
+       VPU_VDIN_WR_MIF2,     /* reg4[7:6], TM2 */
+       VPU_DMA,              /* reg4[11:8], TM2 */
 
        VPU_MOD_MAX,