drm/radeon/kms/legacy: set common regs to sane value
authorAlex Deucher <alexdeucher@gmail.com>
Fri, 4 Dec 2009 15:55:12 +0000 (10:55 -0500)
committerDave Airlie <airlied@redhat.com>
Mon, 7 Dec 2009 22:51:12 +0000 (08:51 +1000)
The DDX and radeonfb always set these regs to a sane value.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
drivers/gpu/drm/radeon/r100.c
drivers/gpu/drm/radeon/r300.c
drivers/gpu/drm/radeon/r420.c
drivers/gpu/drm/radeon/radeon.h

index 9b2ac9d69c0f3fdd1060405c195ab1137042467f..109096802e660574fc7383be5ec1715b684522b7 100644 (file)
@@ -1675,6 +1675,17 @@ int r100_gpu_reset(struct radeon_device *rdev)
        return 0;
 }
 
+void r100_set_common_regs(struct radeon_device *rdev)
+{
+       /* set these so they don't interfere with anything */
+       WREG32(RADEON_OV0_SCALE_CNTL, 0);
+       WREG32(RADEON_SUBPIC_CNTL, 0);
+       WREG32(RADEON_VIPH_CONTROL, 0);
+       WREG32(RADEON_I2C_CNTL_1, 0);
+       WREG32(RADEON_DVI_I2C_CNTL_1, 0);
+       WREG32(RADEON_CAP0_TRIG_CNTL, 0);
+       WREG32(RADEON_CAP1_TRIG_CNTL, 0);
+}
 
 /*
  * VRAM info
@@ -3129,6 +3140,9 @@ static int r100_startup(struct radeon_device *rdev)
 {
        int r;
 
+       /* set common regs */
+       r100_set_common_regs(rdev);
+       /* program mc */
        r100_mc_program(rdev);
        /* Resume clock */
        r100_clock_startup(rdev);
index b3d1d8b9df92b1dfb37639df2ef4457aa9990227..86065dcc1982a1f36c89aea06caf1b52c9e62e01 100644 (file)
@@ -1186,6 +1186,9 @@ static int r300_startup(struct radeon_device *rdev)
 {
        int r;
 
+       /* set common regs */
+       r100_set_common_regs(rdev);
+       /* program mc */
        r300_mc_program(rdev);
        /* Resume clock */
        r300_clock_startup(rdev);
index d72f0439b2fa1e6afa916976b21b1e93fef671e2..162c3902fe69f7b618d031a6fa285ee1837807ab 100644 (file)
@@ -169,6 +169,9 @@ static int r420_startup(struct radeon_device *rdev)
 {
        int r;
 
+       /* set common regs */
+       r100_set_common_regs(rdev);
+       /* program mc */
        r300_mc_program(rdev);
        /* Resume clock */
        r420_clock_resume(rdev);
index 92bebc0f481476550dfa22752021fac5eac37482..f3deb4982b2d00c31f1751f0307ec24d5981208f 100644 (file)
@@ -1046,6 +1046,7 @@ extern int r100_cs_packet_parse(struct radeon_cs_parser *p,
                                struct radeon_cs_packet *pkt,
                                unsigned idx);
 extern void r100_enable_bm(struct radeon_device *rdev);
+extern void r100_set_common_regs(struct radeon_device *rdev);
 
 /* rv200,rv250,rv280 */
 extern void r200_set_safe_registers(struct radeon_device *rdev);