x86/bugs: Rename SSBD_NO to SSB_NO
authorKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Thu, 17 May 2018 03:18:09 +0000 (23:18 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 22 May 2018 16:54:07 +0000 (18:54 +0200)
commit 240da953fcc6a9008c92fae5b1f727ee5ed167ab upstream

The "336996 Speculative Execution Side Channel Mitigations" from
May defines this as SSB_NO, hence lets sync-up.

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/x86/include/asm/msr-index.h
arch/x86/kernel/cpu/common.c

index 44af6ce41e9d38028823e3a698d923598d2c9b6b..504b21692d3277d37ee1d22bf1367faec9d4db97 100644 (file)
@@ -70,7 +70,7 @@
 #define MSR_IA32_ARCH_CAPABILITIES     0x0000010a
 #define ARCH_CAP_RDCL_NO               (1 << 0)   /* Not susceptible to Meltdown */
 #define ARCH_CAP_IBRS_ALL              (1 << 1)   /* Enhanced IBRS support */
-#define ARCH_CAP_SSBD_NO               (1 << 4)   /*
+#define ARCH_CAP_SSB_NO                        (1 << 4)   /*
                                                    * Not susceptible to Speculative Store Bypass
                                                    * attack, so no Speculative Store Bypass
                                                    * control required.
index 5e86f1ce5ff98e7b641a69cccff5d43fe189b719..48e98964ecadb71754c32f300d2e99544e733400 100644 (file)
@@ -941,7 +941,7 @@ static void __init cpu_set_bug_bits(struct cpuinfo_x86 *c)
                rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap);
 
        if (!x86_match_cpu(cpu_no_spec_store_bypass) &&
-          !(ia32_cap & ARCH_CAP_SSBD_NO))
+          !(ia32_cap & ARCH_CAP_SSB_NO))
                setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS);
 
        if (x86_match_cpu(cpu_no_speculation))