{
struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
- if (!ACPI_HANDLE(&pdev->dev))
- return -ENODEV;
-
dev->adapter.nr = -1;
dev->tx_fifo_depth = 32;
dev->rx_fifo_depth = 32;
struct resource *mem;
struct dw_i2c_platform_data *pdata;
int irq, r;
- u32 clk_freq;
+ u32 clk_freq, ht = 0;
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
dev->irq = irq;
platform_set_drvdata(pdev, dev);
- dev->clk = devm_clk_get(&pdev->dev, NULL);
- dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
-
- if (IS_ERR(dev->clk))
- return PTR_ERR(dev->clk);
- clk_prepare_enable(dev->clk);
-
/* fast mode by default because of legacy reasons */
clk_freq = 400000;
- if (pdev->dev.of_node) {
- u32 ht = 0;
- u32 ic_clk = dev->get_clk_rate_khz(dev);
-
+ if (ACPI_COMPANION(&pdev->dev)) {
+ dw_i2c_acpi_configure(pdev);
+ } else if (pdev->dev.of_node) {
of_property_read_u32(pdev->dev.of_node,
"i2c-sda-hold-time-ns", &ht);
- dev->sda_hold_time = div_u64((u64)ic_clk * ht + 500000,
- 1000000);
of_property_read_u32(pdev->dev.of_node,
"i2c-sda-falling-time-ns",
dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST;
- /* Try first if we can configure the device from ACPI */
- r = dw_i2c_acpi_configure(pdev);
- if (r) {
+ dev->clk = devm_clk_get(&pdev->dev, NULL);
+ dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
+ if (IS_ERR(dev->clk))
+ return PTR_ERR(dev->clk);
+ clk_prepare_enable(dev->clk);
+
+ if (!dev->sda_hold_time && ht) {
+ u32 ic_clk = dev->get_clk_rate_khz(dev);
+
+ dev->sda_hold_time = div_u64((u64)ic_clk * ht + 500000,
+ 1000000);
+ }
+
+ if (!dev->tx_fifo_depth) {
u32 param1 = i2c_dw_read_comp_param(dev);
dev->tx_fifo_depth = ((param1 >> 16) & 0xff) + 1;