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drm/radeon: enable gfx cgcg on CIK dGPUs
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 19 Dec 2013 14:13:30 +0000 (09:13 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 24 Dec 2013 22:57:20 +0000 (17:57 -0500)
Enable coarse grained clockgating on CIK dGPUs.  This
works properly now that smc is initialized earlier than
the rlc and cp.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/radeon_asic.c patch | blob | blame | history

diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 5b14b9e8f0ab4077af88e8668f9833f7d7306f3e..14934ae77c7de13c7c82a239514f0d1b52cf6f9a 100644 (file)
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -2460,7 +2460,7 @@ int radeon_asic_init(struct radeon_device *rdev)
                        rdev->cg_flags =
                                RADEON_CG_SUPPORT_GFX_MGCG |
                                RADEON_CG_SUPPORT_GFX_MGLS |
-                               /*RADEON_CG_SUPPORT_GFX_CGCG |*/
+                               RADEON_CG_SUPPORT_GFX_CGCG |
                                RADEON_CG_SUPPORT_GFX_CGLS |
                                RADEON_CG_SUPPORT_GFX_CGTS |
                                RADEON_CG_SUPPORT_GFX_CGTS_LS |
@@ -2479,7 +2479,7 @@ int radeon_asic_init(struct radeon_device *rdev)
                        rdev->cg_flags =
                                RADEON_CG_SUPPORT_GFX_MGCG |
                                RADEON_CG_SUPPORT_GFX_MGLS |
-                               /*RADEON_CG_SUPPORT_GFX_CGCG |*/
+                               RADEON_CG_SUPPORT_GFX_CGCG |
                                RADEON_CG_SUPPORT_GFX_CGLS |
                                RADEON_CG_SUPPORT_GFX_CGTS |
                                RADEON_CG_SUPPORT_GFX_CP_LS |