ARM: dts: r7s72100: Rename the serial port clock to fck
authorLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Fri, 29 Jan 2016 09:47:32 +0000 (10:47 +0100)
committerSimon Horman <horms+renesas@verge.net.au>
Tue, 9 Feb 2016 18:43:14 +0000 (19:43 +0100)
The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/boot/dts/r7s72100.dtsi

index a5938c72d5bde5059bae33497893f2458b2051ad..89e46ebef1bca7ce3dd02399a2a264f0a903a687 100644 (file)
                             <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
-               clock-names = "sci_ick";
+               clock-names = "fck";
                power-domains = <&cpg_clocks>;
                status = "disabled";
        };
                             <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
-               clock-names = "sci_ick";
+               clock-names = "fck";
                power-domains = <&cpg_clocks>;
                status = "disabled";
        };
                             <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
-               clock-names = "sci_ick";
+               clock-names = "fck";
                power-domains = <&cpg_clocks>;
                status = "disabled";
        };
                             <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
-               clock-names = "sci_ick";
+               clock-names = "fck";
                power-domains = <&cpg_clocks>;
                status = "disabled";
        };
                             <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
-               clock-names = "sci_ick";
+               clock-names = "fck";
                power-domains = <&cpg_clocks>;
                status = "disabled";
        };
                             <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
-               clock-names = "sci_ick";
+               clock-names = "fck";
                power-domains = <&cpg_clocks>;
                status = "disabled";
        };
                             <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
-               clock-names = "sci_ick";
+               clock-names = "fck";
                power-domains = <&cpg_clocks>;
                status = "disabled";
        };
                             <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
-               clock-names = "sci_ick";
+               clock-names = "fck";
                power-domains = <&cpg_clocks>;
                status = "disabled";
        };