ARM: dts: exynos: Add MSHC2 DT node for Exynos3250 SoC
authorChanwoo Choi <cw00.choi@samsung.com>
Thu, 31 Mar 2016 02:48:03 +0000 (11:48 +0900)
committerKrzysztof Kozlowski <k.kozlowski@samsung.com>
Fri, 1 Apr 2016 00:21:06 +0000 (09:21 +0900)
This patch adds the MSHC2 (Mobile Storage Host Controller) Device Tree node for
Exynos3250 SoC.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
arch/arm/boot/dts/exynos3250-pinctrl.dtsi
arch/arm/boot/dts/exynos3250.dtsi

index 54c587f2726596b7597896871936747472f32428..40ea7de449336ca8677579834d979708e077fc0d 100644 (file)
                samsung,pin-drv = <3>;
        };
 
+       sd2_clk: sd2-clk {
+               samsung,pins = "gpk2-0";
+               samsung,pin-function = <2>;
+               samsung,pin-pud = <0>;
+               samsung,pin-drv = <3>;
+       };
+
+       sd2_cmd: sd2-cmd {
+               samsung,pins = "gpk2-1";
+               samsung,pin-function = <2>;
+               samsung,pin-pud = <0>;
+               samsung,pin-drv = <3>;
+       };
+
+       sd2_cd: sd2-cd {
+               samsung,pins = "gpk2-2";
+               samsung,pin-function = <2>;
+               samsung,pin-pud = <3>;
+               samsung,pin-drv = <3>;
+       };
+
+       sd2_bus1: sd2-bus-width1 {
+               samsung,pins = "gpk2-3";
+               samsung,pin-function = <2>;
+               samsung,pin-pud = <3>;
+               samsung,pin-drv = <3>;
+       };
+
+       sd2_bus4: sd2-bus-width4 {
+               samsung,pins = "gpk2-4", "gpk2-5", "gpk2-6";
+               samsung,pin-function = <2>;
+               samsung,pin-pud = <3>;
+               samsung,pin-drv = <3>;
+       };
+
        cam_port_b_io: cam-port-b-io {
                samsung,pins = "gpm0-0", "gpm0-1", "gpm0-2", "gpm0-3",
                                "gpm0-4", "gpm0-5", "gpm0-6", "gpm0-7",
index 030ce800f748119f82464a9523172715172376ae..13d00f94cb818249402c39d2cbf28bfa17dd5f8f 100644 (file)
@@ -31,6 +31,7 @@
                pinctrl1 = &pinctrl_1;
                mshc0 = &mshc_0;
                mshc1 = &mshc_1;
+               mshc2 = &mshc_2;
                spi0 = &spi_0;
                spi1 = &spi_1;
                i2c0 = &i2c_0;
                        status = "disabled";
                };
 
+               mshc_2: mshc@12530000 {
+                       compatible = "samsung,exynos5250-dw-mshc";
+                       reg = <0x12530000 0x1000>;
+                       interrupts = <0 144 0>;
+                       clocks = <&cmu CLK_SDMMC2>, <&cmu CLK_SCLK_MMC2>;
+                       clock-names = "biu", "ciu";
+                       fifo-depth = <0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                exynos_usbphy: exynos-usbphy@125B0000 {
                        compatible = "samsung,exynos3250-usb2-phy";
                        reg = <0x125B0000 0x100>;