iio: at91: Use different prescal, startup mask in MR for different IP
authorJosh Wu <josh.wu@atmel.com>
Tue, 27 Aug 2013 11:28:00 +0000 (12:28 +0100)
committerJonathan Cameron <jic23@kernel.org>
Thu, 29 Aug 2013 20:49:28 +0000 (21:49 +0100)
For at91 boards, there are different IPs for adc. Different IPs has different
STARTUP & PRESCAL mask in ADC_MR.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
arch/arm/mach-at91/include/mach/at91_adc.h
drivers/iio/adc/at91_adc.c
include/linux/platform_data/at91_adc.h

index bea1a2021d1e3802170028c6dfca865af06644b9..048a57f76bd3bbbac837e543cd4a4a7048b5e3e0 100644 (file)
 #define                        AT91_ADC_TRGSEL_EXTERNAL        (6 << 1)
 #define                AT91_ADC_LOWRES         (1 << 4)        /* Low Resolution */
 #define                AT91_ADC_SLEEP          (1 << 5)        /* Sleep Mode */
-#define                AT91_ADC_PRESCAL        (0x3f << 8)     /* Prescalar Rate Selection */
+#define                AT91_ADC_PRESCAL_9260   (0x3f << 8)     /* Prescalar Rate Selection */
+#define                AT91_ADC_PRESCAL_9G45   (0xff << 8)
 #define                        AT91_ADC_PRESCAL_(x)    ((x) << 8)
-#define                AT91_ADC_STARTUP        (0x1f << 16)    /* Startup Up Time */
+#define                AT91_ADC_STARTUP_9260   (0x1f << 16)    /* Startup Up Time */
+#define                AT91_ADC_STARTUP_9G45   (0x7f << 16)
+#define                AT91_ADC_STARTUP_9X5    (0xf << 16)
 #define                        AT91_ADC_STARTUP_(x)    ((x) << 16)
 #define                AT91_ADC_SHTIM          (0xf  << 24)    /* Sample & Hold Time */
 #define                        AT91_ADC_SHTIM_(x)      ((x) << 24)
index ed5eebc93bb742136739e5bd6b6ed3ddfca81468..84be63bdf0382b6b44dfa14ff818e72377baf779 100644 (file)
@@ -672,8 +672,8 @@ static int at91_adc_probe(struct platform_device *pdev)
        shtim = round_up((st->sample_hold_time * adc_clk /
                          1000000) - 1, 1);
 
-       reg = AT91_ADC_PRESCAL_(prsc) & AT91_ADC_PRESCAL;
-       reg |= AT91_ADC_STARTUP_(ticks) & AT91_ADC_STARTUP;
+       reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask;
+       reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask;
        if (st->low_res)
                reg |= AT91_ADC_LOWRES;
        if (st->sleep_mode)
@@ -746,6 +746,8 @@ static struct at91_adc_caps at91sam9260_caps = {
                .drdy_mask = AT91_ADC_DRDY,
                .status_register = AT91_ADC_SR,
                .trigger_register = AT91_ADC_TRGR_9260,
+               .mr_prescal_mask = AT91_ADC_PRESCAL_9260,
+               .mr_startup_mask = AT91_ADC_STARTUP_9260,
        },
 };
 
@@ -755,6 +757,8 @@ static struct at91_adc_caps at91sam9g45_caps = {
                .drdy_mask = AT91_ADC_DRDY,
                .status_register = AT91_ADC_SR,
                .trigger_register = AT91_ADC_TRGR_9G45,
+               .mr_prescal_mask = AT91_ADC_PRESCAL_9G45,
+               .mr_startup_mask = AT91_ADC_STARTUP_9G45,
        },
 };
 
@@ -764,6 +768,9 @@ static struct at91_adc_caps at91sam9x5_caps = {
                .drdy_mask = AT91_ADC_SR_DRDY_9X5,
                .status_register = AT91_ADC_SR_9X5,
                .trigger_register = AT91_ADC_TRGR_9X5,
+               /* prescal mask is same as 9G45 */
+               .mr_prescal_mask = AT91_ADC_PRESCAL_9G45,
+               .mr_startup_mask = AT91_ADC_STARTUP_9X5,
        },
 };
 
index e15745b4f3a5314f7bb7630398abeeff4cb0ad51..b3ca1e94e0c88f1108ddd0065e32b93924531ee3 100644 (file)
                        (Interruptions registers mostly)
  * @status_register:   Offset of the Interrupt Status Register
  * @trigger_register:  Offset of the Trigger setup register
+ * @mr_prescal_mask:   Mask of the PRESCAL field in the adc MR register
+ * @mr_startup_mask:   Mask of the STARTUP field in the adc MR register
  */
 struct at91_adc_reg_desc {
        u8      channel_base;
        u32     drdy_mask;
        u8      status_register;
        u8      trigger_register;
+       u32     mr_prescal_mask;
+       u32     mr_startup_mask;
 };
 
 /**