powerpc/fsl-pci: Unify pci/pcie initialization code
authorJia Hongtao <B38951@freescale.com>
Tue, 28 Aug 2012 07:44:08 +0000 (15:44 +0800)
committerKumar Gala <galak@kernel.crashing.org>
Wed, 12 Sep 2012 19:57:12 +0000 (14:57 -0500)
We unified the Freescale pci/pcie initialization by changing the fsl_pci
to a platform driver. In previous PCI code architecture the initialization
routine is called at board_setup_arch stage. Now the initialization is done
in probe function which is architectural better. Also It's convenient for
adding PM support for PCI controller in later patch.

Now we registered pci controllers as platform devices. So we combine two
initialization code as one platform driver.

Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
33 files changed:
arch/powerpc/platforms/85xx/common.c
arch/powerpc/platforms/85xx/corenet_ds.c
arch/powerpc/platforms/85xx/ge_imp3a.c
arch/powerpc/platforms/85xx/mpc8536_ds.c
arch/powerpc/platforms/85xx/mpc85xx_ads.c
arch/powerpc/platforms/85xx/mpc85xx_cds.c
arch/powerpc/platforms/85xx/mpc85xx_ds.c
arch/powerpc/platforms/85xx/mpc85xx_mds.c
arch/powerpc/platforms/85xx/mpc85xx_rdb.c
arch/powerpc/platforms/85xx/p1010rdb.c
arch/powerpc/platforms/85xx/p1022_ds.c
arch/powerpc/platforms/85xx/p1022_rdk.c
arch/powerpc/platforms/85xx/p1023_rds.c
arch/powerpc/platforms/85xx/p2041_rdb.c
arch/powerpc/platforms/85xx/p3041_ds.c
arch/powerpc/platforms/85xx/p4080_ds.c
arch/powerpc/platforms/85xx/p5020_ds.c
arch/powerpc/platforms/85xx/p5040_ds.c
arch/powerpc/platforms/85xx/qemu_e500.c
arch/powerpc/platforms/85xx/sbc8548.c
arch/powerpc/platforms/85xx/socrates.c
arch/powerpc/platforms/85xx/stx_gp3.c
arch/powerpc/platforms/85xx/tqm85xx.c
arch/powerpc/platforms/85xx/xes_mpc85xx.c
arch/powerpc/platforms/86xx/gef_ppc9a.c
arch/powerpc/platforms/86xx/gef_sbc310.c
arch/powerpc/platforms/86xx/gef_sbc610.c
arch/powerpc/platforms/86xx/mpc8610_hpcd.c
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
arch/powerpc/platforms/86xx/sbc8641d.c
arch/powerpc/sysdev/fsl_pci.c
arch/powerpc/sysdev/fsl_pci.h
drivers/edac/mpc85xx_edac.c

index 67dac22b4363c07f5add4b0c56c06af0d3225ba9..d0861a0d836067ff9c3897eb9e1101917ba78e06 100644 (file)
@@ -27,6 +27,16 @@ static struct of_device_id __initdata mpc85xx_common_ids[] = {
        { .compatible = "fsl,mpc8548-guts", },
        /* Probably unnecessary? */
        { .compatible = "gpio-leds", },
+       /* For all PCI controllers */
+       { .compatible = "fsl,mpc8540-pci", },
+       { .compatible = "fsl,mpc8548-pcie", },
+       { .compatible = "fsl,p1022-pcie", },
+       { .compatible = "fsl,p1010-pcie", },
+       { .compatible = "fsl,p1023-pcie", },
+       { .compatible = "fsl,p4080-pcie", },
+       { .compatible = "fsl,qoriq-pcie-v2.4", },
+       { .compatible = "fsl,qoriq-pcie-v2.3", },
+       { .compatible = "fsl,qoriq-pcie-v2.2", },
        {},
 };
 
index 473d5738111979241857cf2a0e8b66ff6fd9cccf..ed69c9250717d19721924a50e7a6b3934bf5a1a5 100644 (file)
@@ -16,7 +16,6 @@
 #include <linux/kdev_t.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
-#include <linux/memblock.h>
 
 #include <asm/time.h>
 #include <asm/machdep.h>
@@ -52,39 +51,16 @@ void __init corenet_ds_pic_init(void)
  */
 void __init corenet_ds_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-       struct pci_controller *hose;
-#endif
-       dma_addr_t max = 0xffffffff;
-
        mpc85xx_smp_init();
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,p4080-pcie") ||
-                   of_device_is_compatible(np, "fsl,qoriq-pcie-v2.2") ||
-                   of_device_is_compatible(np, "fsl,qoriq-pcie-v2.3") ||
-                   of_device_is_compatible(np, "fsl,qoriq-pcie-v2.4")) {
-                       fsl_add_bridge(np, 0);
-                       hose = pci_find_hose_for_OF_device(np);
-                       max = min(max, hose->dma_window_base_cur +
-                                       hose->dma_window_size);
-               }
-       }
-
-#ifdef CONFIG_PPC64
+#if defined(CONFIG_PCI) && defined(CONFIG_PPC64)
        pci_devs_phb_init();
 #endif
-#endif
 
-#ifdef CONFIG_SWIOTLB
-       if ((memblock_end_of_DRAM() - 1) > max) {
-               ppc_swiotlb_enable = 1;
-               set_pci_dma_ops(&swiotlb_dma_ops);
-               ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-       }
-#endif
+       fsl_pci_assign_primary();
+
+       swiotlb_detect_4g();
+
        pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
 }
 
index b6a728b0a8ca0aae6427e619046633b94a35cd25..e6285ae6f4239d5e12ada123c937c272964f4e67 100644 (file)
@@ -22,7 +22,6 @@
 #include <linux/seq_file.h>
 #include <linux/interrupt.h>
 #include <linux/of_platform.h>
-#include <linux/memblock.h>
 
 #include <asm/time.h>
 #include <asm/machdep.h>
@@ -84,53 +83,39 @@ void __init ge_imp3a_pic_init(void)
        of_node_put(cascade_node);
 }
 
-#ifdef CONFIG_PCI
-static int primary_phb_addr;
-#endif /* CONFIG_PCI */
-
-/*
- * Setup the architecture
- */
-static void __init ge_imp3a_setup_arch(void)
+static void ge_imp3a_pci_assign_primary(void)
 {
-       struct device_node *regs;
 #ifdef CONFIG_PCI
        struct device_node *np;
-       struct pci_controller *hose;
-#endif
-       dma_addr_t max = 0xffffffff;
+       struct resource rsrc;
 
-       if (ppc_md.progress)
-               ppc_md.progress("ge_imp3a_setup_arch()", 0);
-
-#ifdef CONFIG_PCI
        for_each_node_by_type(np, "pci") {
                if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
                    of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
                    of_device_is_compatible(np, "fsl,p2020-pcie")) {
-                       struct resource rsrc;
                        of_address_to_resource(np, 0, &rsrc);
-                       if ((rsrc.start & 0xfffff) == primary_phb_addr)
-                               fsl_add_bridge(np, 1);
-                       else
-                               fsl_add_bridge(np, 0);
-
-                       hose = pci_find_hose_for_OF_device(np);
-                       max = min(max, hose->dma_window_base_cur +
-                                       hose->dma_window_size);
+                       if ((rsrc.start & 0xfffff) == 0x9000)
+                               fsl_pci_primary = np;
                }
        }
 #endif
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init ge_imp3a_setup_arch(void)
+{
+       struct device_node *regs;
+
+       if (ppc_md.progress)
+               ppc_md.progress("ge_imp3a_setup_arch()", 0);
 
        mpc85xx_smp_init();
 
-#ifdef CONFIG_SWIOTLB
-       if ((memblock_end_of_DRAM() - 1) > max) {
-               ppc_swiotlb_enable = 1;
-               set_pci_dma_ops(&swiotlb_dma_ops);
-               ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-       }
-#endif
+       ge_imp3a_pci_assign_primary();
+
+       swiotlb_detect_4g();
 
        /* Remap basic board registers */
        regs = of_find_compatible_node(NULL, NULL, "ge,imp3a-fpga-regs");
@@ -215,17 +200,10 @@ static int __init ge_imp3a_probe(void)
 {
        unsigned long root = of_get_flat_dt_root();
 
-       if (of_flat_dt_is_compatible(root, "ge,IMP3A")) {
-#ifdef CONFIG_PCI
-               primary_phb_addr = 0x9000;
-#endif
-               return 1;
-       }
-
-       return 0;
+       return of_flat_dt_is_compatible(root, "ge,IMP3A");
 }
 
-machine_device_initcall(ge_imp3a, mpc85xx_common_publish_devices);
+machine_arch_initcall(ge_imp3a, mpc85xx_common_publish_devices);
 
 machine_arch_initcall(ge_imp3a, swiotlb_setup_bus_notifier);
 
index 767c7cf18a9c978f7b9b70f700ed5ca496fdfd73..15ce4b55f117896b2f96cd3dd0bab994a8310613 100644 (file)
@@ -17,7 +17,6 @@
 #include <linux/seq_file.h>
 #include <linux/interrupt.h>
 #include <linux/of_platform.h>
-#include <linux/memblock.h>
 
 #include <asm/time.h>
 #include <asm/machdep.h>
@@ -46,46 +45,17 @@ void __init mpc8536_ds_pic_init(void)
  */
 static void __init mpc8536_ds_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-       struct pci_controller *hose;
-#endif
-       dma_addr_t max = 0xffffffff;
-
        if (ppc_md.progress)
                ppc_md.progress("mpc8536_ds_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-                   of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
-                       struct resource rsrc;
-                       of_address_to_resource(np, 0, &rsrc);
-                       if ((rsrc.start & 0xfffff) == 0x8000)
-                               fsl_add_bridge(np, 1);
-                       else
-                               fsl_add_bridge(np, 0);
-
-                       hose = pci_find_hose_for_OF_device(np);
-                       max = min(max, hose->dma_window_base_cur +
-                                       hose->dma_window_size);
-               }
-       }
-
-#endif
+       fsl_pci_assign_primary();
 
-#ifdef CONFIG_SWIOTLB
-       if ((memblock_end_of_DRAM() - 1) > max) {
-               ppc_swiotlb_enable = 1;
-               set_pci_dma_ops(&swiotlb_dma_ops);
-               ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-       }
-#endif
+       swiotlb_detect_4g();
 
        printk("MPC8536 DS board from Freescale Semiconductor\n");
 }
 
-machine_device_initcall(mpc8536_ds, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc8536_ds, mpc85xx_common_publish_devices);
 
 machine_arch_initcall(mpc8536_ds, swiotlb_setup_bus_notifier);
 
index 29ee8fcd75a25046d3124beeda43c02cdb5434c2..7d12a19aa7eecddddb58cff630478faa8f87893d 100644 (file)
@@ -137,10 +137,6 @@ static void __init init_ioports(void)
 
 static void __init mpc85xx_ads_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-
        if (ppc_md.progress)
                ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
 
@@ -150,11 +146,10 @@ static void __init mpc85xx_ads_setup_arch(void)
 #endif
 
 #ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
-               fsl_add_bridge(np, 1);
-
        ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 #endif
+
+       fsl_pci_assign_primary();
 }
 
 static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
@@ -173,7 +168,7 @@ static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
        seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 }
 
-machine_device_initcall(mpc85xx_ads, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc85xx_ads, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
index 11156fb53d831089f896b2c4ebbf3f94d614df06..c474505ad0d06c39ec340d8373c507eba509b1ac 100644 (file)
@@ -276,6 +276,33 @@ machine_device_initcall(mpc85xx_cds, mpc85xx_cds_8259_attach);
 
 #endif /* CONFIG_PPC_I8259 */
 
+static void mpc85xx_cds_pci_assign_primary(void)
+{
+#ifdef CONFIG_PCI
+       struct device_node *np;
+
+       if (fsl_pci_primary)
+               return;
+
+       /*
+        * MPC85xx_CDS has ISA bridge but unfortunately there is no
+        * isa node in device tree. We now looking for i8259 node as
+        * a workaround for such a broken device tree. This routine
+        * is for complying to all device trees.
+        */
+       np = of_find_node_by_name(NULL, "i8259");
+       while ((fsl_pci_primary = of_get_parent(np))) {
+               of_node_put(np);
+               np = fsl_pci_primary;
+
+               if ((of_device_is_compatible(np, "fsl,mpc8540-pci") ||
+                   of_device_is_compatible(np, "fsl,mpc8548-pcie")) &&
+                   of_device_is_available(np))
+                       return;
+       }
+#endif
+}
+
 /*
  * Setup the architecture
  */
@@ -309,21 +336,12 @@ static void __init mpc85xx_cds_setup_arch(void)
        }
 
 #ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-                   of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
-                       struct resource rsrc;
-                       of_address_to_resource(np, 0, &rsrc);
-                       if ((rsrc.start & 0xfffff) == 0x8000)
-                               fsl_add_bridge(np, 1);
-                       else
-                               fsl_add_bridge(np, 0);
-               }
-       }
-
        ppc_md.pci_irq_fixup = mpc85xx_cds_pci_irq_fixup;
        ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 #endif
+
+       mpc85xx_cds_pci_assign_primary();
+       fsl_pci_assign_primary();
 }
 
 static void mpc85xx_cds_show_cpuinfo(struct seq_file *m)
@@ -355,7 +373,7 @@ static int __init mpc85xx_cds_probe(void)
         return of_flat_dt_is_compatible(root, "MPC85xxCDS");
 }
 
-machine_device_initcall(mpc85xx_cds, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc85xx_cds, mpc85xx_common_publish_devices);
 
 define_machine(mpc85xx_cds) {
        .name           = "MPC85xx CDS",
index 56f8c8f674df108d46d4f69866475b26ae1f1476..9ebb91ed96a332e1683ec364f3e7ba2a5e0cd982 100644 (file)
@@ -20,7 +20,6 @@
 #include <linux/seq_file.h>
 #include <linux/interrupt.h>
 #include <linux/of_platform.h>
-#include <linux/memblock.h>
 
 #include <asm/time.h>
 #include <asm/machdep.h>
@@ -129,13 +128,11 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
 }
 #endif /* CONFIG_PCI */
 
-static void __init mpc85xx_ds_pci_init(void)
+static void __init mpc85xx_ds_uli_init(void)
 {
 #ifdef CONFIG_PCI
        struct device_node *node;
 
-       fsl_pci_init();
-
        /* See if we have a ULI under the primary */
 
        node = of_find_node_by_name(NULL, "uli1575");
@@ -160,7 +157,8 @@ static void __init mpc85xx_ds_setup_arch(void)
                ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
 
        swiotlb_detect_4g();
-       mpc85xx_ds_pci_init();
+       fsl_pci_assign_primary();
+       mpc85xx_ds_uli_init();
        mpc85xx_smp_init();
 
        printk("MPC85xx DS board from Freescale Semiconductor\n");
@@ -176,9 +174,9 @@ static int __init mpc8544_ds_probe(void)
        return !!of_flat_dt_is_compatible(root, "MPC8544DS");
 }
 
-machine_device_initcall(mpc8544_ds, mpc85xx_common_publish_devices);
-machine_device_initcall(mpc8572_ds, mpc85xx_common_publish_devices);
-machine_device_initcall(p2020_ds, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc8544_ds, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc8572_ds, mpc85xx_common_publish_devices);
+machine_arch_initcall(p2020_ds, mpc85xx_common_publish_devices);
 
 machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier);
 machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier);
index 8e4b094c553b49d142bceba1f29cf48c0805ed18..8498f7323470c8447ef827440fe5355652f2c20d 100644 (file)
@@ -327,44 +327,16 @@ static void __init mpc85xx_mds_qeic_init(void) { }
 
 static void __init mpc85xx_mds_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct pci_controller *hose;
-       struct device_node *np;
-#endif
-       dma_addr_t max = 0xffffffff;
-
        if (ppc_md.progress)
                ppc_md.progress("mpc85xx_mds_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-                   of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
-                       struct resource rsrc;
-                       of_address_to_resource(np, 0, &rsrc);
-                       if ((rsrc.start & 0xfffff) == 0x8000)
-                               fsl_add_bridge(np, 1);
-                       else
-                               fsl_add_bridge(np, 0);
-
-                       hose = pci_find_hose_for_OF_device(np);
-                       max = min(max, hose->dma_window_base_cur +
-                                       hose->dma_window_size);
-               }
-       }
-#endif
-
        mpc85xx_smp_init();
 
        mpc85xx_mds_qe_init();
 
-#ifdef CONFIG_SWIOTLB
-       if ((memblock_end_of_DRAM() - 1) > max) {
-               ppc_swiotlb_enable = 1;
-               set_pci_dma_ops(&swiotlb_dma_ops);
-               ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-       }
-#endif
+       fsl_pci_assign_primary();
+
+       swiotlb_detect_4g();
 }
 
 
@@ -409,9 +381,9 @@ static int __init mpc85xx_publish_devices(void)
        return mpc85xx_common_publish_devices();
 }
 
-machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices);
-machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices);
-machine_device_initcall(p1021_mds, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc8568_mds, mpc85xx_publish_devices);
+machine_arch_initcall(mpc8569_mds, mpc85xx_publish_devices);
+machine_arch_initcall(p1021_mds, mpc85xx_common_publish_devices);
 
 machine_arch_initcall(mpc8568_mds, swiotlb_setup_bus_notifier);
 machine_arch_initcall(mpc8569_mds, swiotlb_setup_bus_notifier);
index 1910fdcb75b2479558564fd08cb4031f553d34f2..ede8771d6f02d259a68a20dbb93469bcce87e981 100644 (file)
@@ -86,23 +86,17 @@ void __init mpc85xx_rdb_pic_init(void)
  */
 static void __init mpc85xx_rdb_setup_arch(void)
 {
-#if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE)
+#ifdef CONFIG_QUICC_ENGINE
        struct device_node *np;
 #endif
 
        if (ppc_md.progress)
                ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8548-pcie"))
-                       fsl_add_bridge(np, 0);
-       }
-
-#endif
-
        mpc85xx_smp_init();
 
+       fsl_pci_assign_primary();
+
 #ifdef CONFIG_QUICC_ENGINE
        np = of_find_compatible_node(NULL, NULL, "fsl,qe");
        if (!np) {
@@ -161,15 +155,15 @@ qe_fail:
        printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
 }
 
-machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
-machine_device_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
-machine_device_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
-machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
-machine_device_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
-machine_device_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
-machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
-machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices);
-machine_device_initcall(p1024_rdb, mpc85xx_common_publish_devices);
+machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices);
+machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
index dbaf44354f0d33a549a9ac4ed1eb0d96b24c9008..0252961392d53f308c326b3afab18ef90b68cdbd 100644 (file)
@@ -46,25 +46,15 @@ void __init p1010_rdb_pic_init(void)
  */
 static void __init p1010_rdb_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-
        if (ppc_md.progress)
                ppc_md.progress("p1010_rdb_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,p1010-pcie"))
-                       fsl_add_bridge(np, 0);
-       }
-
-#endif
+       fsl_pci_assign_primary();
 
        printk(KERN_INFO "P1010 RDB board from Freescale Semiconductor\n");
 }
 
-machine_device_initcall(p1010_rdb, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1010_rdb, mpc85xx_common_publish_devices);
 machine_arch_initcall(p1010_rdb, swiotlb_setup_bus_notifier);
 
 /*
index 3c732acf331dcda708bbc8cc08b28567f5596c44..848a3e98e1c1a187a8ddb96797af932681c2b6ab 100644 (file)
@@ -18,7 +18,6 @@
 
 #include <linux/pci.h>
 #include <linux/of_platform.h>
-#include <linux/memblock.h>
 #include <asm/div64.h>
 #include <asm/mpic.h>
 #include <asm/swiotlb.h>
@@ -507,32 +506,9 @@ early_param("video", early_video_setup);
  */
 static void __init p1022_ds_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-       dma_addr_t max = 0xffffffff;
-
        if (ppc_md.progress)
                ppc_md.progress("p1022_ds_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,p1022-pcie") {
-               struct resource rsrc;
-               struct pci_controller *hose;
-
-               of_address_to_resource(np, 0, &rsrc);
-
-               if ((rsrc.start & 0xfffff) == 0x8000)
-                       fsl_add_bridge(np, 1);
-               else
-                       fsl_add_bridge(np, 0);
-
-               hose = pci_find_hose_for_OF_device(np);
-               max = min(max, hose->dma_window_base_cur +
-                         hose->dma_window_size);
-       }
-#endif
-
 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
        diu_ops.get_pixel_format        = p1022ds_get_pixel_format;
        diu_ops.set_gamma_table         = p1022ds_set_gamma_table;
@@ -601,18 +577,14 @@ static void __init p1022_ds_setup_arch(void)
 
        mpc85xx_smp_init();
 
-#ifdef CONFIG_SWIOTLB
-       if ((memblock_end_of_DRAM() - 1) > max) {
-               ppc_swiotlb_enable = 1;
-               set_pci_dma_ops(&swiotlb_dma_ops);
-               ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-       }
-#endif
+       fsl_pci_assign_primary();
+
+       swiotlb_detect_4g();
 
        pr_info("Freescale P1022 DS reference board\n");
 }
 
-machine_device_initcall(p1022_ds, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1022_ds, mpc85xx_common_publish_devices);
 
 machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier);
 
index b3cf11b92e7550c9093d80d7cf19138d9a905945..55ffa1cc380cc0ec1c5796b96415e81a6908d835 100644 (file)
@@ -14,7 +14,6 @@
 
 #include <linux/pci.h>
 #include <linux/of_platform.h>
-#include <linux/memblock.h>
 #include <asm/div64.h>
 #include <asm/mpic.h>
 #include <asm/swiotlb.h>
@@ -121,32 +120,9 @@ void __init p1022_rdk_pic_init(void)
  */
 static void __init p1022_rdk_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-       dma_addr_t max = 0xffffffff;
-
        if (ppc_md.progress)
                ppc_md.progress("p1022_rdk_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,p1022-pcie") {
-               struct resource rsrc;
-               struct pci_controller *hose;
-
-               of_address_to_resource(np, 0, &rsrc);
-
-               if ((rsrc.start & 0xfffff) == 0x8000)
-                       fsl_add_bridge(np, 1);
-               else
-                       fsl_add_bridge(np, 0);
-
-               hose = pci_find_hose_for_OF_device(np);
-               max = min(max, hose->dma_window_base_cur +
-                         hose->dma_window_size);
-       }
-#endif
-
 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
        diu_ops.set_monitor_port        = p1022rdk_set_monitor_port;
        diu_ops.set_pixel_clock         = p1022rdk_set_pixel_clock;
@@ -155,18 +131,14 @@ static void __init p1022_rdk_setup_arch(void)
 
        mpc85xx_smp_init();
 
-#ifdef CONFIG_SWIOTLB
-       if ((memblock_end_of_DRAM() - 1) > max) {
-               ppc_swiotlb_enable = 1;
-               set_pci_dma_ops(&swiotlb_dma_ops);
-               ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-       }
-#endif
+       fsl_pci_assign_primary();
+
+       swiotlb_detect_4g();
 
        pr_info("Freescale / iVeia P1022 RDK reference board\n");
 }
 
-machine_device_initcall(p1022_rdk, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1022_rdk, mpc85xx_common_publish_devices);
 
 machine_arch_initcall(p1022_rdk, swiotlb_setup_bus_notifier);
 
index 2990e8b13dc957850b0820ede1bf2633317f80ff..9cc60a73883424893022f4343f6eddeabefe2aeb 100644 (file)
@@ -80,15 +80,12 @@ static void __init mpc85xx_rds_setup_arch(void)
                }
        }
 
-#ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,p1023-pcie")
-               fsl_add_bridge(np, 0);
-#endif
-
        mpc85xx_smp_init();
+
+       fsl_pci_assign_primary();
 }
 
-machine_device_initcall(p1023_rds, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1023_rds, mpc85xx_common_publish_devices);
 
 static void __init mpc85xx_rds_pic_init(void)
 {
index 6541fa2630c0114d83275cb1413d4822ddbe1b8a..000c0892fc40ec532222c781fd9c0ffe45dc2e3c 100644 (file)
@@ -80,7 +80,7 @@ define_machine(p2041_rdb) {
        .power_save             = e500_idle,
 };
 
-machine_device_initcall(p2041_rdb, corenet_ds_publish_devices);
+machine_arch_initcall(p2041_rdb, corenet_ds_publish_devices);
 
 #ifdef CONFIG_SWIOTLB
 machine_arch_initcall(p2041_rdb, swiotlb_setup_bus_notifier);
index f238efa75891e2099a9c5d695035292fcab853d6..b3edc205daa9acd4afddf5932d69a397ddadd90c 100644 (file)
@@ -82,7 +82,7 @@ define_machine(p3041_ds) {
        .power_save             = e500_idle,
 };
 
-machine_device_initcall(p3041_ds, corenet_ds_publish_devices);
+machine_arch_initcall(p3041_ds, corenet_ds_publish_devices);
 
 #ifdef CONFIG_SWIOTLB
 machine_arch_initcall(p3041_ds, swiotlb_setup_bus_notifier);
index c92417dc657412e2a62c9de968d8f02c8777ec70..54df10632aeab45a71909c463d5cc461a57ffe57 100644 (file)
@@ -81,7 +81,7 @@ define_machine(p4080_ds) {
        .power_save             = e500_idle,
 };
 
-machine_device_initcall(p4080_ds, corenet_ds_publish_devices);
+machine_arch_initcall(p4080_ds, corenet_ds_publish_devices);
 #ifdef CONFIG_SWIOTLB
 machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier);
 #endif
index 17bef15a85eda1cdce2a8acbc4353047c12c8d39..753a42c29d4dfd75f8fe640b80d4f368e7648cb0 100644 (file)
@@ -91,7 +91,7 @@ define_machine(p5020_ds) {
 #endif
 };
 
-machine_device_initcall(p5020_ds, corenet_ds_publish_devices);
+machine_arch_initcall(p5020_ds, corenet_ds_publish_devices);
 
 #ifdef CONFIG_SWIOTLB
 machine_arch_initcall(p5020_ds, swiotlb_setup_bus_notifier);
index 8e22a3436e04703fc7bfeb901cf7e29633057fe2..11381851828ee22f444c320837ca362dae98d598 100644 (file)
@@ -82,7 +82,7 @@ define_machine(p5040_ds) {
 #endif
 };
 
-machine_device_initcall(p5040_ds, corenet_ds_publish_devices);
+machine_arch_initcall(p5040_ds, corenet_ds_publish_devices);
 
 #ifdef CONFIG_SWIOTLB
 machine_arch_initcall(p5040_ds, swiotlb_setup_bus_notifier);
index 3c5490c8423feecd8ecd545e40e8eceb6a65cae6..f6ea5618c7331acfe5daf3dde5a2a17a9e243bdd 100644 (file)
@@ -41,7 +41,7 @@ static void __init qemu_e500_setup_arch(void)
 {
        ppc_md.progress("qemu_e500_setup_arch()", 0);
 
-       fsl_pci_init();
+       fsl_pci_assign_primary();
        swiotlb_detect_4g();
        mpc85xx_smp_init();
 }
@@ -56,7 +56,7 @@ static int __init qemu_e500_probe(void)
        return !!of_flat_dt_is_compatible(root, "fsl,qemu-e500");
 }
 
-machine_device_initcall(qemu_e500, mpc85xx_common_publish_devices);
+machine_arch_initcall(qemu_e500, mpc85xx_common_publish_devices);
 
 define_machine(qemu_e500) {
        .name                   = "QEMU e500",
index cd3a66bdb54bcc696cf42ddcc60a744127dbf686..f62121825914d952add0d638adfc470551e6e0da 100644 (file)
@@ -88,26 +88,11 @@ static int __init sbc8548_hw_rev(void)
  */
 static void __init sbc8548_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-
        if (ppc_md.progress)
                ppc_md.progress("sbc8548_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-                   of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
-                       struct resource rsrc;
-                       of_address_to_resource(np, 0, &rsrc);
-                       if ((rsrc.start & 0xfffff) == 0x8000)
-                               fsl_add_bridge(np, 1);
-                       else
-                               fsl_add_bridge(np, 0);
-               }
-       }
-#endif
+       fsl_pci_assign_primary();
+
        sbc_rev = sbc8548_hw_rev();
 }
 
@@ -128,7 +113,7 @@ static void sbc8548_show_cpuinfo(struct seq_file *m)
        seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 }
 
-machine_device_initcall(sbc8548, mpc85xx_common_publish_devices);
+machine_arch_initcall(sbc8548, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
index b9c6daa07b66a8440123b28d5acade808ec0b83d..ae368e0e1076e0376aa2a3147c03504d926184a3 100644 (file)
@@ -66,20 +66,13 @@ static void __init socrates_pic_init(void)
  */
 static void __init socrates_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-
        if (ppc_md.progress)
                ppc_md.progress("socrates_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
-               fsl_add_bridge(np, 1);
-#endif
+       fsl_pci_assign_primary();
 }
 
-machine_device_initcall(socrates, mpc85xx_common_publish_devices);
+machine_arch_initcall(socrates, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
index e0508002b0861437021443838bcda14be97c4e43..6f4939b6309e2efa7780f7e09c7f716c2281243a 100644 (file)
@@ -60,21 +60,14 @@ static void __init stx_gp3_pic_init(void)
  */
 static void __init stx_gp3_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-
        if (ppc_md.progress)
                ppc_md.progress("stx_gp3_setup_arch()", 0);
 
+       fsl_pci_assign_primary();
+
 #ifdef CONFIG_CPM2
        cpm2_reset();
 #endif
-
-#ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
-               fsl_add_bridge(np, 1);
-#endif
 }
 
 static void stx_gp3_show_cpuinfo(struct seq_file *m)
@@ -93,7 +86,7 @@ static void stx_gp3_show_cpuinfo(struct seq_file *m)
        seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 }
 
-machine_device_initcall(stx_gp3, mpc85xx_common_publish_devices);
+machine_arch_initcall(stx_gp3, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
index 3e70a2035e53c50b68e3625b87d5634b8041fffb..d8941eea70754ccee29357bc46ad09432e6b4cbf 100644 (file)
@@ -59,10 +59,6 @@ static void __init tqm85xx_pic_init(void)
  */
 static void __init tqm85xx_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-
        if (ppc_md.progress)
                ppc_md.progress("tqm85xx_setup_arch()", 0);
 
@@ -70,20 +66,7 @@ static void __init tqm85xx_setup_arch(void)
        cpm2_reset();
 #endif
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-                   of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
-                       struct resource rsrc;
-                       if (!of_address_to_resource(np, 0, &rsrc)) {
-                               if ((rsrc.start & 0xfffff) == 0x8000)
-                                       fsl_add_bridge(np, 1);
-                               else
-                                       fsl_add_bridge(np, 0);
-                       }
-               }
-       }
-#endif
+       fsl_pci_assign_primary();
 }
 
 static void tqm85xx_show_cpuinfo(struct seq_file *m)
@@ -123,7 +106,7 @@ static void __devinit tqm85xx_ti1520_fixup(struct pci_dev *pdev)
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
                tqm85xx_ti1520_fixup);
 
-machine_device_initcall(tqm85xx, mpc85xx_common_publish_devices);
+machine_arch_initcall(tqm85xx, mpc85xx_common_publish_devices);
 
 static const char *board[] __initdata = {
        "tqc,tqm8540",
index 41c687550ea7e4f26a95bd252e901a6ea9f83f12..dcbf7e42dce79100881ac66ea4ab93e9a8b5571c 100644 (file)
@@ -111,18 +111,11 @@ static void xes_mpc85xx_fixups(void)
        }
 }
 
-#ifdef CONFIG_PCI
-static int primary_phb_addr;
-#endif
-
 /*
  * Setup the architecture
  */
 static void __init xes_mpc85xx_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
        struct device_node *root;
        const char *model = "Unknown";
 
@@ -137,26 +130,14 @@ static void __init xes_mpc85xx_setup_arch(void)
 
        xes_mpc85xx_fixups();
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-                   of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
-                       struct resource rsrc;
-                       of_address_to_resource(np, 0, &rsrc);
-                       if ((rsrc.start & 0xfffff) == primary_phb_addr)
-                               fsl_add_bridge(np, 1);
-                       else
-                               fsl_add_bridge(np, 0);
-               }
-       }
-#endif
-
        mpc85xx_smp_init();
+
+       fsl_pci_assign_primary();
 }
 
-machine_device_initcall(xes_mpc8572, mpc85xx_common_publish_devices);
-machine_device_initcall(xes_mpc8548, mpc85xx_common_publish_devices);
-machine_device_initcall(xes_mpc8540, mpc85xx_common_publish_devices);
+machine_arch_initcall(xes_mpc8572, mpc85xx_common_publish_devices);
+machine_arch_initcall(xes_mpc8548, mpc85xx_common_publish_devices);
+machine_arch_initcall(xes_mpc8540, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
@@ -165,42 +146,21 @@ static int __init xes_mpc8572_probe(void)
 {
        unsigned long root = of_get_flat_dt_root();
 
-       if (of_flat_dt_is_compatible(root, "xes,MPC8572")) {
-#ifdef CONFIG_PCI
-               primary_phb_addr = 0x8000;
-#endif
-               return 1;
-       } else {
-               return 0;
-       }
+       return of_flat_dt_is_compatible(root, "xes,MPC8572");
 }
 
 static int __init xes_mpc8548_probe(void)
 {
        unsigned long root = of_get_flat_dt_root();
 
-       if (of_flat_dt_is_compatible(root, "xes,MPC8548")) {
-#ifdef CONFIG_PCI
-               primary_phb_addr = 0xb000;
-#endif
-               return 1;
-       } else {
-               return 0;
-       }
+       return of_flat_dt_is_compatible(root, "xes,MPC8548");
 }
 
 static int __init xes_mpc8540_probe(void)
 {
        unsigned long root = of_get_flat_dt_root();
 
-       if (of_flat_dt_is_compatible(root, "xes,MPC8540")) {
-#ifdef CONFIG_PCI
-               primary_phb_addr = 0xb000;
-#endif
-               return 1;
-       } else {
-               return 0;
-       }
+       return of_flat_dt_is_compatible(root, "xes,MPC8540");
 }
 
 define_machine(xes_mpc8572) {
index 563aafa8629cfa8a6afd5e5d57442a58adccc2a7..bf5338754c5a301d83d8dbd9fc652fa482912b9f 100644 (file)
@@ -73,13 +73,6 @@ static void __init gef_ppc9a_init_irq(void)
 static void __init gef_ppc9a_setup_arch(void)
 {
        struct device_node *regs;
-#ifdef CONFIG_PCI
-       struct device_node *np;
-
-       for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
-               fsl_add_bridge(np, 1);
-       }
-#endif
 
        printk(KERN_INFO "GE Intelligent Platforms PPC9A 6U VME SBC\n");
 
@@ -87,6 +80,8 @@ static void __init gef_ppc9a_setup_arch(void)
        mpc86xx_smp_init();
 #endif
 
+       fsl_pci_assign_primary();
+
        /* Remap basic board registers */
        regs = of_find_compatible_node(NULL, NULL, "gef,ppc9a-fpga-regs");
        if (regs) {
@@ -221,6 +216,7 @@ static long __init mpc86xx_time_init(void)
 static __initdata struct of_device_id of_bus_ids[] = {
        { .compatible = "simple-bus", },
        { .compatible = "gianfar", },
+       { .compatible = "fsl,mpc8641-pcie", },
        {},
 };
 
@@ -231,7 +227,7 @@ static int __init declare_of_platform_devices(void)
 
        return 0;
 }
-machine_device_initcall(gef_ppc9a, declare_of_platform_devices);
+machine_arch_initcall(gef_ppc9a, declare_of_platform_devices);
 
 define_machine(gef_ppc9a) {
        .name                   = "GE PPC9A",
index cc6a91ae0889c262519208e506d3081dca113191..0b7851330a07aebb9f9f1f5e83252347d4901c57 100644 (file)
@@ -73,20 +73,14 @@ static void __init gef_sbc310_init_irq(void)
 static void __init gef_sbc310_setup_arch(void)
 {
        struct device_node *regs;
-#ifdef CONFIG_PCI
-       struct device_node *np;
-
-       for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
-               fsl_add_bridge(np, 1);
-       }
-#endif
-
        printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n");
 
 #ifdef CONFIG_SMP
        mpc86xx_smp_init();
 #endif
 
+       fsl_pci_assign_primary();
+
        /* Remap basic board registers */
        regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
        if (regs) {
@@ -209,6 +203,7 @@ static long __init mpc86xx_time_init(void)
 static __initdata struct of_device_id of_bus_ids[] = {
        { .compatible = "simple-bus", },
        { .compatible = "gianfar", },
+       { .compatible = "fsl,mpc8641-pcie", },
        {},
 };
 
@@ -219,7 +214,7 @@ static int __init declare_of_platform_devices(void)
 
        return 0;
 }
-machine_device_initcall(gef_sbc310, declare_of_platform_devices);
+machine_arch_initcall(gef_sbc310, declare_of_platform_devices);
 
 define_machine(gef_sbc310) {
        .name                   = "GE SBC310",
index aead6b337f4a3a9969330469048f61d7bc459a8d..b9eb174897b16c621c3cee6fa8dcabd911f12744 100644 (file)
@@ -73,13 +73,6 @@ static void __init gef_sbc610_init_irq(void)
 static void __init gef_sbc610_setup_arch(void)
 {
        struct device_node *regs;
-#ifdef CONFIG_PCI
-       struct device_node *np;
-
-       for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
-               fsl_add_bridge(np, 1);
-       }
-#endif
 
        printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n");
 
@@ -87,6 +80,8 @@ static void __init gef_sbc610_setup_arch(void)
        mpc86xx_smp_init();
 #endif
 
+       fsl_pci_assign_primary();
+
        /* Remap basic board registers */
        regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
        if (regs) {
@@ -198,6 +193,7 @@ static long __init mpc86xx_time_init(void)
 static __initdata struct of_device_id of_bus_ids[] = {
        { .compatible = "simple-bus", },
        { .compatible = "gianfar", },
+       { .compatible = "fsl,mpc8641-pcie", },
        {},
 };
 
@@ -208,7 +204,7 @@ static int __init declare_of_platform_devices(void)
 
        return 0;
 }
-machine_device_initcall(gef_sbc610, declare_of_platform_devices);
+machine_arch_initcall(gef_sbc610, declare_of_platform_devices);
 
 define_machine(gef_sbc610) {
        .name                   = "GE SBC610",
index 62cd3c555bfbcf80a57dc29f1450786b5aa41ae4..a817398a56da7c6b86c5a070cd58819b42bcdd63 100644 (file)
@@ -91,6 +91,9 @@ static struct of_device_id __initdata mpc8610_ids[] = {
        { .compatible = "simple-bus", },
        /* So that the DMA channel nodes can be probed individually: */
        { .compatible = "fsl,eloplus-dma", },
+       /* PCI controllers */
+       { .compatible = "fsl,mpc8610-pci", },
+       { .compatible = "fsl,mpc8641-pcie", },
        {}
 };
 
@@ -107,7 +110,7 @@ static int __init mpc8610_declare_of_platform_devices(void)
 
        return 0;
 }
-machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
+machine_arch_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
 
 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
 
@@ -278,25 +281,13 @@ mpc8610hpcd_valid_monitor_port(enum fsl_diu_monitor_port port)
 static void __init mpc86xx_hpcd_setup_arch(void)
 {
        struct resource r;
-       struct device_node *np;
        unsigned char *pixis;
 
        if (ppc_md.progress)
                ppc_md.progress("mpc86xx_hpcd_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8610-pci")
-                   || of_device_is_compatible(np, "fsl,mpc8641-pcie")) {
-                       struct resource rsrc;
-                       of_address_to_resource(np, 0, &rsrc);
-                       if ((rsrc.start & 0xfffff) == 0xa000)
-                               fsl_add_bridge(np, 1);
-                       else
-                               fsl_add_bridge(np, 0);
-               }
-        }
-#endif
+       fsl_pci_assign_primary();
+
 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
        diu_ops.get_pixel_format        = mpc8610hpcd_get_pixel_format;
        diu_ops.set_gamma_table         = mpc8610hpcd_set_gamma_table;
index 817245bc02195a37917b5dd341d7790ba5a50737..e8bf3fae56060dfa2645701db57839e8092f8e28 100644 (file)
@@ -19,7 +19,6 @@
 #include <linux/delay.h>
 #include <linux/seq_file.h>
 #include <linux/of_platform.h>
-#include <linux/memblock.h>
 
 #include <asm/time.h>
 #include <asm/machdep.h>
@@ -51,15 +50,8 @@ extern int uli_exclude_device(struct pci_controller *hose,
 static int mpc86xx_exclude_device(struct pci_controller *hose,
                                   u_char bus, u_char devfn)
 {
-       struct device_node* node;       
-       struct resource rsrc;
-
-       node = hose->dn;
-       of_address_to_resource(node, 0, &rsrc);
-
-       if ((rsrc.start & 0xfffff) == 0x8000) {
+       if (hose->dn == fsl_pci_primary)
                return uli_exclude_device(hose, bus, devfn);
-       }
 
        return PCIBIOS_SUCCESSFUL;
 }
@@ -69,30 +61,11 @@ static int mpc86xx_exclude_device(struct pci_controller *hose,
 static void __init
 mpc86xx_hpcn_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-       struct pci_controller *hose;
-#endif
-       dma_addr_t max = 0xffffffff;
-
        if (ppc_md.progress)
                ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0);
 
 #ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
-               struct resource rsrc;
-               of_address_to_resource(np, 0, &rsrc);
-               if ((rsrc.start & 0xfffff) == 0x8000)
-                       fsl_add_bridge(np, 1);
-               else
-                       fsl_add_bridge(np, 0);
-               hose = pci_find_hose_for_OF_device(np);
-               max = min(max, hose->dma_window_base_cur +
-                         hose->dma_window_size);
-       }
-
        ppc_md.pci_exclude_device = mpc86xx_exclude_device;
-
 #endif
 
        printk("MPC86xx HPCN board from Freescale Semiconductor\n");
@@ -101,13 +74,9 @@ mpc86xx_hpcn_setup_arch(void)
        mpc86xx_smp_init();
 #endif
 
-#ifdef CONFIG_SWIOTLB
-       if ((memblock_end_of_DRAM() - 1) > max) {
-               ppc_swiotlb_enable = 1;
-               set_pci_dma_ops(&swiotlb_dma_ops);
-               ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-       }
-#endif
+       fsl_pci_assign_primary();
+
+       swiotlb_detect_4g();
 }
 
 
@@ -162,6 +131,7 @@ static __initdata struct of_device_id of_bus_ids[] = {
        { .compatible = "simple-bus", },
        { .compatible = "fsl,srio", },
        { .compatible = "gianfar", },
+       { .compatible = "fsl,mpc8641-pcie", },
        {},
 };
 
@@ -171,7 +141,7 @@ static int __init declare_of_platform_devices(void)
 
        return 0;
 }
-machine_device_initcall(mpc86xx_hpcn, declare_of_platform_devices);
+machine_arch_initcall(mpc86xx_hpcn, declare_of_platform_devices);
 machine_arch_initcall(mpc86xx_hpcn, swiotlb_setup_bus_notifier);
 
 define_machine(mpc86xx_hpcn) {
index e7007d0d949e0ae73e655dc62d36fe8c4bbc02a5..b47a8fd0f3d30ad4d2d3e1bfa45a43761bc9e8f1 100644 (file)
 static void __init
 sbc8641_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-
        if (ppc_md.progress)
                ppc_md.progress("sbc8641_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie")
-               fsl_add_bridge(np, 0);
-#endif
-
        printk("SBC8641 board from Wind River\n");
 
 #ifdef CONFIG_SMP
        mpc86xx_smp_init();
 #endif
+
+       fsl_pci_assign_primary();
 }
 
 
@@ -102,6 +95,7 @@ mpc86xx_time_init(void)
 static __initdata struct of_device_id of_bus_ids[] = {
        { .compatible = "simple-bus", },
        { .compatible = "gianfar", },
+       { .compatible = "fsl,mpc8641-pcie", },
        {},
 };
 
@@ -111,7 +105,7 @@ static int __init declare_of_platform_devices(void)
 
        return 0;
 }
-machine_device_initcall(sbc8641, declare_of_platform_devices);
+machine_arch_initcall(sbc8641, declare_of_platform_devices);
 
 define_machine(sbc8641) {
        .name                   = "SBC8641D",
index 23acaf4692dcff648117631248f1df7fda7e7507..2ff35765a6ad3c548f4052295ba01801b6d257f6 100644 (file)
@@ -828,54 +828,78 @@ static const struct of_device_id pci_ids[] = {
 
 struct device_node *fsl_pci_primary;
 
-void __devinit fsl_pci_init(void)
+void fsl_pci_assign_primary(void)
 {
-       int ret;
-       struct device_node *node;
-       struct pci_controller *hose;
-       dma_addr_t max = 0xffffffff;
+       struct device_node *np;
 
        /* Callers can specify the primary bus using other means. */
-       if (!fsl_pci_primary) {
-               /* If a PCI host bridge contains an ISA node, it's primary. */
-               node = of_find_node_by_type(NULL, "isa");
-               while ((fsl_pci_primary = of_get_parent(node))) {
-                       of_node_put(node);
-                       node = fsl_pci_primary;
-
-                       if (of_match_node(pci_ids, node))
-                               break;
-               }
+       if (fsl_pci_primary)
+               return;
+
+       /* If a PCI host bridge contains an ISA node, it's primary. */
+       np = of_find_node_by_type(NULL, "isa");
+       while ((fsl_pci_primary = of_get_parent(np))) {
+               of_node_put(np);
+               np = fsl_pci_primary;
+
+               if (of_match_node(pci_ids, np) && of_device_is_available(np))
+                       return;
        }
 
-       node = NULL;
-       for_each_node_by_type(node, "pci") {
-               if (of_match_node(pci_ids, node)) {
-                       /*
-                        * If there's no PCI host bridge with ISA, arbitrarily
-                        * designate one as primary.  This can go away once
-                        * various bugs with primary-less systems are fixed.
-                        */
-                       if (!fsl_pci_primary)
-                               fsl_pci_primary = node;
-
-                       ret = fsl_add_bridge(node, fsl_pci_primary == node);
-                       if (ret == 0) {
-                               hose = pci_find_hose_for_OF_device(node);
-                               max = min(max, hose->dma_window_base_cur +
-                                               hose->dma_window_size);
-                       }
+       /*
+        * If there's no PCI host bridge with ISA, arbitrarily
+        * designate one as primary.  This can go away once
+        * various bugs with primary-less systems are fixed.
+        */
+       for_each_matching_node(np, pci_ids) {
+               if (of_device_is_available(np)) {
+                       fsl_pci_primary = np;
+                       of_node_put(np);
+                       return;
                }
        }
+}
+
+static int __devinit fsl_pci_probe(struct platform_device *pdev)
+{
+       int ret;
+       struct device_node *node;
+       struct pci_controller *hose;
+
+       node = pdev->dev.of_node;
+       ret = fsl_add_bridge(node, fsl_pci_primary == node);
 
 #ifdef CONFIG_SWIOTLB
-       /*
-        * if we couldn't map all of DRAM via the dma windows
-        * we need SWIOTLB to handle buffers located outside of
-        * dma capable memory region
-        */
-       if (memblock_end_of_DRAM() - 1 > max)
-               ppc_swiotlb_enable = 1;
+       if (ret == 0) {
+               hose = pci_find_hose_for_OF_device(pdev->dev.of_node);
+
+               /*
+                * if we couldn't map all of DRAM via the dma windows
+                * we need SWIOTLB to handle buffers located outside of
+                * dma capable memory region
+                */
+               if (memblock_end_of_DRAM() - 1 > hose->dma_window_base_cur +
+                               hose->dma_window_size)
+                       ppc_swiotlb_enable = 1;
+       }
 #endif
+
+       mpc85xx_pci_err_probe(pdev);
+
+       return 0;
+}
+
+static struct platform_driver fsl_pci_driver = {
+       .driver = {
+               .name = "fsl-pci",
+               .of_match_table = pci_ids,
+       },
+       .probe = fsl_pci_probe,
+};
+
+static int __init fsl_pci_init(void)
+{
+       return platform_driver_register(&fsl_pci_driver);
 }
+arch_initcall(fsl_pci_init);
 #endif
index 54ed82c532355ffdc27df42a64abac99e2fba6d3..d078537adece3e2d59e59691ef8bf64620d11fcb 100644 (file)
@@ -98,10 +98,19 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose);
 
 extern struct device_node *fsl_pci_primary;
 
-#ifdef CONFIG_FSL_PCI
-void fsl_pci_init(void);
+#ifdef CONFIG_PCI
+void fsl_pci_assign_primary(void);
 #else
-static inline void fsl_pci_init(void) {}
+static inline void fsl_pci_assign_primary(void) {}
+#endif
+
+#ifdef CONFIG_EDAC_MPC85XX
+int mpc85xx_pci_err_probe(struct platform_device *op);
+#else
+static inline int mpc85xx_pci_err_probe(struct platform_device *op)
+{
+       return -ENOTSUPP;
+}
 #endif
 
 #endif /* __POWERPC_FSL_PCI_H */
index a1e791ec25d38514b7c47ae27bd2cab0198ded68..4fe66fa183ec964acc27781ed8f8b90eaaaa41eb 100644 (file)
@@ -212,7 +212,7 @@ static irqreturn_t mpc85xx_pci_isr(int irq, void *dev_id)
        return IRQ_HANDLED;
 }
 
-static int __devinit mpc85xx_pci_err_probe(struct platform_device *op)
+int __devinit mpc85xx_pci_err_probe(struct platform_device *op)
 {
        struct edac_pci_ctl_info *pci;
        struct mpc85xx_pci_pdata *pdata;
@@ -226,6 +226,16 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op)
        if (!pci)
                return -ENOMEM;
 
+       /* make sure error reporting method is sane */
+       switch (edac_op_state) {
+       case EDAC_OPSTATE_POLL:
+       case EDAC_OPSTATE_INT:
+               break;
+       default:
+               edac_op_state = EDAC_OPSTATE_INT;
+               break;
+       }
+
        pdata = pci->pvt_info;
        pdata->name = "mpc85xx_pci_err";
        pdata->irq = NO_IRQ;
@@ -315,6 +325,7 @@ err:
        devres_release_group(&op->dev, mpc85xx_pci_err_probe);
        return res;
 }
+EXPORT_SYMBOL(mpc85xx_pci_err_probe);
 
 static int mpc85xx_pci_err_remove(struct platform_device *op)
 {
@@ -338,27 +349,6 @@ static int mpc85xx_pci_err_remove(struct platform_device *op)
        return 0;
 }
 
-static struct of_device_id mpc85xx_pci_err_of_match[] = {
-       {
-        .compatible = "fsl,mpc8540-pcix",
-        },
-       {
-        .compatible = "fsl,mpc8540-pci",
-       },
-       {},
-};
-MODULE_DEVICE_TABLE(of, mpc85xx_pci_err_of_match);
-
-static struct platform_driver mpc85xx_pci_err_driver = {
-       .probe = mpc85xx_pci_err_probe,
-       .remove = __devexit_p(mpc85xx_pci_err_remove),
-       .driver = {
-               .name = "mpc85xx_pci_err",
-               .owner = THIS_MODULE,
-               .of_match_table = mpc85xx_pci_err_of_match,
-       },
-};
-
 #endif                         /* CONFIG_PCI */
 
 /**************************** L2 Err device ***************************/
@@ -1210,12 +1200,6 @@ static int __init mpc85xx_mc_init(void)
        if (res)
                printk(KERN_WARNING EDAC_MOD_STR "L2 fails to register\n");
 
-#ifdef CONFIG_PCI
-       res = platform_driver_register(&mpc85xx_pci_err_driver);
-       if (res)
-               printk(KERN_WARNING EDAC_MOD_STR "PCI fails to register\n");
-#endif
-
 #ifdef CONFIG_FSL_SOC_BOOKE
        pvr = mfspr(SPRN_PVR);
 
@@ -1251,9 +1235,6 @@ static void __exit mpc85xx_mc_exit(void)
            (PVR_VER(pvr) == PVR_VER_E500V2)) {
                on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
        }
-#endif
-#ifdef CONFIG_PCI
-       platform_driver_unregister(&mpc85xx_pci_err_driver);
 #endif
        platform_driver_unregister(&mpc85xx_l2_err_driver);
        platform_driver_unregister(&mpc85xx_mc_err_driver);