hdmirx: Optimize hdmirx power consumption [1/1]
authoryicheng shen <yicheng.shen@amlogic.com>
Thu, 17 Oct 2019 08:40:41 +0000 (16:40 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Wed, 30 Oct 2019 05:47:52 +0000 (22:47 -0700)
PD#SWPL-10073

Problem:
The power consumption of hdmirx need to be optimized when
there're no deviced connected.

Solution:
Power off hdmirx phy/pll when no rx input

Verify:
TL1/TM2

Change-Id: Iba34e3a4cd72c2fd72ff05f608114179ae59055c
Signed-off-by: yicheng shen <yicheng.shen@amlogic.com>
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h
drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.c

index 148e4d8b40663d20c308dc5998f736b869fc4996..289569020e0a5eb5b4d3421c31dcdc7eeb36ba10 100644 (file)
@@ -47,7 +47,7 @@
  *
  *
  */
-#define RX_VER2 "ver.2019/09/11"
+#define RX_VER2 "ver.2019/10/17"
 
 /*print type*/
 #define        LOG_EN          0x01
index cb31828bba4eff75d5b7d3d6850b3ef6c377780e..5f49a57c9447b902ded1428114bbf2da0de8fda5 100644 (file)
@@ -4023,6 +4023,26 @@ void rx_phy_rxsense_pulse(unsigned int t1, unsigned int t2, bool en)
        mdelay(t2);
 }
 
+void aml_phy_power_off(void)
+{
+       /* pll power down */
+       wr_reg_hhi_bits(HHI_HDMIRX_APLL_CNTL0, _BIT(28), 0);
+       wr_reg_hhi_bits(HHI_HDMIRX_APLL_CNTL0, _BIT(29), 1);
+
+       /* phy power down */
+       wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL0, 0x32037800);
+       wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL1, 0x1000000);
+       wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL2, 0x62208002);
+       wr_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL3, 0x7);
+       wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL0, 0x1e);
+       wr_reg_hhi(HHI_HDMIRX_PHY_DCHA_CNTL1, 0x10000800);
+       wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL0, 0x200000);
+       wr_reg_hhi(HHI_HDMIRX_PHY_DCHD_CNTL1, 0x0);
+
+       if (log_level & VIDEO_LOG)
+               rx_pr("%s\n", __func__);
+}
+
 void rx_phy_power_on(unsigned int onoff)
 {
        if (onoff)
@@ -4032,10 +4052,7 @@ void rx_phy_power_on(unsigned int onoff)
        if (rx.chip_id >= CHIP_ID_TL1) {
                /*the enable of these regs are in phy init*/
                if (onoff == 0) {
-                       wr_reg_hhi_bits(HHI_HDMIRX_APLL_CNTL0, _BIT(28), onoff);
-                       /*close termination 3.3v*/
-                       wr_reg_hhi_bits(HHI_HDMIRX_PHY_MISC_CNTL0,
-                                       MSK(3, 0), onoff);
+                       aml_phy_power_off();
                }
        }
 }