drm/amd/powerplay: add GFX/SYS clockgating support for ELM/BAF

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.c
index 0dee0dfa91ecb85d3c34bfda5d83e5487999a352..a94f6a8e88a28be3c3fc48b03286a9f726541ccd 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.c
@@ -151,3 +151,250 @@ int ellesmere_phm_powergate_samu(struct pp_hwmgr *hwmgr, bool bgate)
        return 0;
 }
 
+int ellesmere_phm_update_clock_gatings(struct pp_hwmgr *hwmgr,
+                                       const uint32_t *msg_id)
+{
+       PPSMC_Msg msg;
+       uint32_t value;
+
+       switch ((*msg_id & PP_GROUP_MASK) >> PP_GROUP_SHIFT) {
+       case PP_GROUP_GFX:
+               switch ((*msg_id & PP_BLOCK_MASK) >> PP_BLOCK_SHIFT) {
+               case PP_BLOCK_GFX_CG:
+                       if (PP_STATE_SUPPORT_CG & *msg_id) {
+                               msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_GFX_CGCG_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+                       if (PP_STATE_SUPPORT_LS & *msg_id) {
+                               msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS
+                                       ? PPSMC_MSG_EnableClockGatingFeature
+                                       : PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_GFX_CGLS_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+                       break;
+
+               case PP_BLOCK_GFX_3D:
+                       if (PP_STATE_SUPPORT_CG & *msg_id) {
+                               msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_GFX_3DCG_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+
+                       if  (PP_STATE_SUPPORT_LS & *msg_id) {
+                               msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_GFX_3DLS_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+                       break;
+
+               case PP_BLOCK_GFX_RLC:
+                       if (PP_STATE_SUPPORT_LS & *msg_id) {
+                               msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_GFX_RLC_LS_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+                       break;
+
+               case PP_BLOCK_GFX_CP:
+                       if (PP_STATE_SUPPORT_LS & *msg_id) {
+                               msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_GFX_CP_LS_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+                       break;
+
+               case PP_BLOCK_GFX_MG:
+                       if (PP_STATE_SUPPORT_CG & *msg_id) {
+                               msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = (CG_CPF_MGCG_MASK | CG_RLC_MGCG_MASK |
+                                               CG_GFX_OTHERS_MGCG_MASK);
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+                       break;
+
+               default:
+                       return -1;
+               }
+               break;
+
+       case PP_GROUP_SYS:
+               switch ((*msg_id & PP_BLOCK_MASK) >> PP_BLOCK_SHIFT) {
+               case PP_BLOCK_SYS_BIF:
+                       if (PP_STATE_SUPPORT_CG & *msg_id) {
+                               msg = (*msg_id & PP_STATE_MASK) & PP_STATE_CG ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_SYS_BIF_MGCG_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+                       if  (PP_STATE_SUPPORT_LS & *msg_id) {
+                               msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_SYS_BIF_MGLS_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+                       break;
+
+               case PP_BLOCK_SYS_MC:
+                       if (PP_STATE_SUPPORT_CG & *msg_id) {
+                               msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_SYS_MC_MGCG_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+
+                       if (PP_STATE_SUPPORT_LS & *msg_id) {
+                               msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_SYS_MC_MGLS_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+                       break;
+
+               case PP_BLOCK_SYS_DRM:
+                       if (PP_STATE_SUPPORT_CG & *msg_id) {
+                               msg = (*msg_id & PP_STATE_MASK) & PP_STATE_CG ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_SYS_DRM_MGCG_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+                       if (PP_STATE_SUPPORT_LS & *msg_id) {
+                               msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_SYS_DRM_MGLS_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+                       break;
+
+               case PP_BLOCK_SYS_HDP:
+                       if (PP_STATE_SUPPORT_CG & *msg_id) {
+                               msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_SYS_HDP_MGCG_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+
+                       if (PP_STATE_SUPPORT_LS & *msg_id) {
+                               msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_SYS_HDP_MGLS_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+                       break;
+
+               case PP_BLOCK_SYS_SDMA:
+                       if (PP_STATE_SUPPORT_CG & *msg_id) {
+                               msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_SYS_SDMA_MGCG_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+
+                       if (PP_STATE_SUPPORT_LS & *msg_id) {
+                               msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_SYS_SDMA_MGLS_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+                       break;
+
+               case PP_BLOCK_SYS_ROM:
+                       if (PP_STATE_SUPPORT_CG & *msg_id) {
+                               msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ?
+                                               PPSMC_MSG_EnableClockGatingFeature :
+                                               PPSMC_MSG_DisableClockGatingFeature;
+                               value = CG_SYS_ROM_MASK;
+
+                               if (smum_send_msg_to_smc_with_parameter(
+                                               hwmgr->smumgr, msg, value))
+                                       return -1;
+                       }
+                       break;
+
+               default:
+                       return -1;
+
+               }
+               break;
+
+       default:
+               return -1;
+
+       }
+
+       return 0;
+}

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.h b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.h
index 56a950e1c94d8a5061fa1ea3a9da159bc4674ad9..a90577eca6a7af1dd7779f290aa637256a98e7b1 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_clockpowergating.h
@@ -33,5 +33,7 @@ int ellesmere_phm_powerdown_uvd(struct pp_hwmgr *hwmgr);
 int ellesmere_phm_powergate_samu(struct pp_hwmgr *hwmgr, bool bgate);
 int ellesmere_phm_powergate_acp(struct pp_hwmgr *hwmgr, bool bgate);
 int ellesmere_phm_disable_clock_power_gating(struct pp_hwmgr *hwmgr);
+int ellesmere_phm_update_clock_gatings(struct pp_hwmgr *hwmgr,
+                                       const uint32_t *msg_id);
 
 #endif /* _ELLESMERE_CLOCK_POWER_GATING_H_ */

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_hwmgr.c
index 043aefa44c0b718f8eb3256d10b06856fbb8ac19..c87d5ef213617b4afb02d4e51da17aecde7a92f1 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/ellesmere_hwmgr.c
@@ -4670,6 +4670,7 @@ static const struct pp_hwmgr_func ellesmere_hwmgr_funcs = {
        .powergate_uvd = ellesmere_phm_powergate_uvd,
        .powergate_vce = ellesmere_phm_powergate_vce,
        .disable_clock_power_gating = ellesmere_phm_disable_clock_power_gating,
+       .update_clock_gatings = ellesmere_phm_update_clock_gatings,
        .notify_smc_display_config_after_ps_adjustment = ellesmere_notify_smc_display_config_after_ps_adjustment,
        .display_config_changed = ellesmere_display_configuration_changed_task,
        .set_max_fan_pwm_output = ellesmere_set_max_fan_pwm_output,