clk: renesas: r8a7796: Add Sound SSI clock
authorKazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Wed, 19 Apr 2017 17:46:34 +0000 (02:46 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 15 May 2017 07:46:31 +0000 (09:46 +0200)
This patch adds SSI(all) and SSI{0,1,2,3,4,5,6,7,8,9} clocks for R8A7796
SoC.

Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a7796-cpg-mssr.c

index d69efa5755fd00bcc9f5165cf080dfa4f0034ed9..43bfb7c39c9fd78897a7dba47e7ea165ec5b8571 100644 (file)
@@ -208,6 +208,17 @@ static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = {
        DEF_MOD("i2c2",                  929,   R8A7796_CLK_S3D2),
        DEF_MOD("i2c1",                  930,   R8A7796_CLK_S3D2),
        DEF_MOD("i2c0",                  931,   R8A7796_CLK_S3D2),
+       DEF_MOD("ssi-all",              1005,   R8A7796_CLK_S3D4),
+       DEF_MOD("ssi9",                 1006,   MOD_CLK_ID(1005)),
+       DEF_MOD("ssi8",                 1007,   MOD_CLK_ID(1005)),
+       DEF_MOD("ssi7",                 1008,   MOD_CLK_ID(1005)),
+       DEF_MOD("ssi6",                 1009,   MOD_CLK_ID(1005)),
+       DEF_MOD("ssi5",                 1010,   MOD_CLK_ID(1005)),
+       DEF_MOD("ssi4",                 1011,   MOD_CLK_ID(1005)),
+       DEF_MOD("ssi3",                 1012,   MOD_CLK_ID(1005)),
+       DEF_MOD("ssi2",                 1013,   MOD_CLK_ID(1005)),
+       DEF_MOD("ssi1",                 1014,   MOD_CLK_ID(1005)),
+       DEF_MOD("ssi0",                 1015,   MOD_CLK_ID(1005)),
 };
 
 static const unsigned int r8a7796_crit_mod_clks[] __initconst = {