devicetree: xilinx: zynqmp: add sata node

add sata node with sata fixed clock nodes in dtsi file.
enable sata in zynqmp-ep108.dts with broken-gen2.

Signed-off-by: Suneel Garapati <suneel.garapati@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
index 0a3f40ecd06da23957742e1a505b76a89f74067e..981e594f16b423603e49d783f31c9915d3258c85 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts
@@ -42,6 +42,11 @@
        };
 };
 
+&sata {
+       status = "okay";
+       ceva,broken-gen2;
+};
+
 &uart0 {
        status = "okay";
 };

diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index 11e0b00045cfb2a739ecac206808201d3b522483..72a37479026b8f7915c072d3b5959f9a4684c56f 100644 (file)
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -272,6 +272,21 @@
                        #size-cells = <0>;
                };
 
+               sata_clk: sata_clk {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <75000000>;
+               };
+
+               sata: ahci@fd0c0000 {
+                       compatible = "ceva,ahci-1v84";
+                       status = "disabled";
+                       reg = <0x0 0xfd0c0000 0x2000>;
+                       interrupt-parent = <&gic>;
+                       interrupts = <0 133 4>;
+                       clocks = <&sata_clk>;
+               };
+
                sdhci0: sdhci@ff160000 {
                        compatible = "arasan,sdhci-8.9a";
                        status = "disabled";