ARM: OMAP3: hwmod data: add sad2d hwmod
authorTero Kristo <t-kristo@ti.com>
Sun, 23 Sep 2012 23:28:21 +0000 (17:28 -0600)
committerPaul Walmsley <paul@pwsan.com>
Sun, 23 Sep 2012 23:28:21 +0000 (17:28 -0600)
SAD2D stands for the die to die interface, and is used for communicating
with the optional stacked modem. This hwmod is added in preparation for
the d2d_idle move from pm34xx.c to hwmod data.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
[paul@pwsan.com: SAD2D presumably doesn't exist on non-OMAP34xx/OMAP36xx,
 so only add it to the OMAP34xx/OMAP36xx lists]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/cm-regbits-34xx.h
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

index 975f6bda0e0b7a84855a2e6c90f8051df747f6a2..59598ffd878333978b1ca2ed52a26fee3b0e7f72 100644 (file)
 #define OMAP3430_ST_MAILBOXES_MASK                     (1 << 7)
 #define OMAP3430_ST_OMAPCTRL_SHIFT                     6
 #define OMAP3430_ST_OMAPCTRL_MASK                      (1 << 6)
+#define OMAP3430_ST_SAD2D_SHIFT                                3
+#define OMAP3430_ST_SAD2D_MASK                         (1 << 3)
 #define OMAP3430_ST_SDMA_SHIFT                         2
 #define OMAP3430_ST_SDMA_MASK                          (1 << 2)
 #define OMAP3430_ST_SDRC_SHIFT                         1
index 8fec2cee3e14a84b7c3bb5390ae492cc04f2fb69..f1328bce5f3c71fd0d375c864ac56fd567845007 100644 (file)
@@ -2033,6 +2033,33 @@ static struct omap_hwmod omap3xxx_hdq1w_hwmod = {
        .class          = &omap2_hdq1w_class,
 };
 
+/* SAD2D */
+static struct omap_hwmod_rst_info omap3xxx_sad2d_resets[] = {
+       { .name = "rst_modem_pwron_sw", .rst_shift = 0 },
+       { .name = "rst_modem_sw", .rst_shift = 1 },
+};
+
+static struct omap_hwmod_class omap3xxx_sad2d_class = {
+       .name                   = "sad2d",
+};
+
+static struct omap_hwmod omap3xxx_sad2d_hwmod = {
+       .name           = "sad2d",
+       .rst_lines      = omap3xxx_sad2d_resets,
+       .rst_lines_cnt  = ARRAY_SIZE(omap3xxx_sad2d_resets),
+       .main_clk       = "sad2d_ick",
+       .prcm           = {
+               .omap2 = {
+                       .module_offs = CORE_MOD,
+                       .prcm_reg_id = 1,
+                       .module_bit = OMAP3430_EN_SAD2D_SHIFT,
+                       .idlest_reg_id = 1,
+                       .idlest_idle_bit = OMAP3430_ST_SAD2D_SHIFT,
+               },
+       },
+       .class          = &omap3xxx_sad2d_class,
+};
+
 /*
  * '32K sync counter' class
  * 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
@@ -2137,6 +2164,14 @@ static struct omap_hwmod_ocp_if am35xx_usbhsotg__l3 = {
        .user           = OCP_USER_MPU,
 };
 
+/* l3_core -> sad2d interface */
+static struct omap_hwmod_ocp_if omap3xxx_sad2d__l3 = {
+       .master         = &omap3xxx_sad2d_hwmod,
+       .slave          = &omap3xxx_l3_main_hwmod,
+       .clk            = "core_l3_ick",
+       .user           = OCP_USER_MPU,
+};
+
 /* L4_CORE -> L4_WKUP interface */
 static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = {
        .master = &omap3xxx_l4_core_hwmod,
@@ -3371,6 +3406,7 @@ static struct omap_hwmod_ocp_if *omap34xx_hwmod_ocp_ifs[] __initdata = {
        &omap34xx_l4_core__sr2,
        &omap3xxx_l4_core__mailbox,
        &omap3xxx_l4_core__hdq1w,
+       &omap3xxx_sad2d__l3,
        NULL
 };
 
@@ -3391,6 +3427,7 @@ static struct omap_hwmod_ocp_if *omap36xx_hwmod_ocp_ifs[] __initdata = {
        &omap3xxx_l4_core__es3plus_mmc1,
        &omap3xxx_l4_core__es3plus_mmc2,
        &omap3xxx_l4_core__hdq1w,
+       &omap3xxx_sad2d__l3,
        NULL
 };