li r0,0
mtspr SPRN_LPID,r0
mfspr r3,SPRN_LPCR
- oris r3, r3, LPCR_AIL_3@h
bl __init_LPCR
bl __init_HFSCR
bl __init_tlb_power8
li r0,0
mtspr SPRN_LPID,r0
mfspr r3,SPRN_LPCR
- oris r3, r3, LPCR_AIL_3@h
bl __init_LPCR
bl __init_HFSCR
bl __init_tlb_power8
get_paca()->data_offset = 0;
}
+static void cpu_ready_for_interrupts(void)
+{
+ /* Set IR and DR in PACA MSR */
+ get_paca()->kernel_msr = MSR_KERNEL;
+
+ /* Enable AIL if supported */
+ if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
+ unsigned long lpcr = mfspr(SPRN_LPCR);
+ mtspr(SPRN_LPCR, lpcr | LPCR_AIL_3);
+ }
+}
+
/*
* Early initialization entry point. This is called by head.S
* with MMU translation disabled. We rely on the "feature" of
/*
* At this point, we can let interrupts switch to virtual mode
* (the MMU has been setup), so adjust the MSR in the PACA to
- * have IR and DR set.
+ * have IR and DR set and enable AIL if it exists
*/
- get_paca()->kernel_msr = MSR_KERNEL;
+ cpu_ready_for_interrupts();
/* Reserve large chunks of memory for use by CMA for KVM */
kvm_cma_reserve();
* (the MMU has been setup), so adjust the MSR in the PACA to
* have IR and DR set.
*/
- get_paca()->kernel_msr = MSR_KERNEL;
+ cpu_ready_for_interrupts();
}
#endif /* CONFIG_SMP */