drm/nouveau/ce/gp100: initial support
authorBen Skeggs <bskeggs@redhat.com>
Sat, 9 Jul 2016 00:41:01 +0000 (10:41 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Thu, 14 Jul 2016 01:53:25 +0000 (11:53 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/include/nvif/class.h
drivers/gpu/drm/nouveau/include/nvkm/engine/ce.h
drivers/gpu/drm/nouveau/nouveau_bo.c
drivers/gpu/drm/nouveau/nvkm/engine/ce/Kbuild
drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

index 6f4efbbecd278b68063cdbfd69a503dfe47fdca8..4bfa59a3cab451a68866ef58d3b825aa33473fec 100644 (file)
 #define FERMI_DMA                                                    0x000090b5
 #define KEPLER_DMA_COPY_A                                            0x0000a0b5
 #define MAXWELL_DMA_COPY_A                                           0x0000b0b5
+#define PASCAL_DMA_COPY_A                                            0x0000c0b5
 
 #define FERMI_DECOMPRESS                                             0x000090b8
 
index 594d719ba41e81edd21f8b079d8f6bfbd85a7a6a..45588742fd9162d5a4c5d93d87577cadfe428ce3 100644 (file)
@@ -7,4 +7,5 @@ int gf100_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
 int gk104_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
 int gm107_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
 int gm200_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
+int gp100_ce_new(struct nvkm_device *, int, struct nvkm_engine **);
 #endif
index 5e3f3e826476cc0b71b64bc12d615841191cebd7..6423c7be9c7fce31aa877dd972d9b6419d69cd5f 100644 (file)
@@ -1104,6 +1104,8 @@ nouveau_bo_move_init(struct nouveau_drm *drm)
                            struct ttm_mem_reg *, struct ttm_mem_reg *);
                int (*init)(struct nouveau_channel *, u32 handle);
        } _methods[] = {
+               {  "COPY", 4, 0xc0b5, nve0_bo_move_copy, nve0_bo_move_init },
+               {  "GRCE", 0, 0xc0b5, nve0_bo_move_copy, nvc0_bo_move_init },
                {  "COPY", 4, 0xb0b5, nve0_bo_move_copy, nve0_bo_move_init },
                {  "GRCE", 0, 0xb0b5, nve0_bo_move_copy, nvc0_bo_move_init },
                {  "COPY", 4, 0xa0b5, nve0_bo_move_copy, nve0_bo_move_init },
index 9c19d59b47df60b0c5ec79661b096052cc259ddc..7d55197e8296c05e8d8aaf32db1d757ecb5b5387 100644 (file)
@@ -3,3 +3,4 @@ nvkm-y += nvkm/engine/ce/gf100.o
 nvkm-y += nvkm/engine/ce/gk104.o
 nvkm-y += nvkm/engine/ce/gm107.o
 nvkm-y += nvkm/engine/ce/gm200.o
+nvkm-y += nvkm/engine/ce/gp100.o
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c b/drivers/gpu/drm/nouveau/nvkm/engine/ce/gp100.c
new file mode 100644 (file)
index 0000000..c771045
--- /dev/null
@@ -0,0 +1,102 @@
+/*
+ * Copyright 2015 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "priv.h"
+#include <core/enum.h>
+
+#include <nvif/class.h>
+
+static const struct nvkm_enum
+gp100_ce_launcherr_report[] = {
+       { 0x0, "NO_ERR" },
+       { 0x1, "2D_LAYER_EXCEEDS_DEPTH" },
+       { 0x2, "INVALID_ALIGNMENT" },
+       { 0x3, "MEM2MEM_RECT_OUT_OF_BOUNDS" },
+       { 0x4, "SRC_LINE_EXCEEDS_PITCH" },
+       { 0x5, "SRC_LINE_EXCEEDS_NEG_PITCH" },
+       { 0x6, "DST_LINE_EXCEEDS_PITCH" },
+       { 0x7, "DST_LINE_EXCEEDS_NEG_PITCH" },
+       { 0x8, "BAD_SRC_PIXEL_COMP_REF" },
+       { 0x9, "INVALID_VALUE" },
+       { 0xa, "UNUSED_FIELD" },
+       { 0xb, "INVALID_OPERATION" },
+       { 0xc, "NO_RESOURCES" },
+       { 0xd, "INVALID_CONFIG" },
+       {}
+};
+
+static void
+gp100_ce_intr_launcherr(struct nvkm_engine *ce, const u32 base)
+{
+       struct nvkm_subdev *subdev = &ce->subdev;
+       struct nvkm_device *device = subdev->device;
+       u32 stat = nvkm_rd32(device, 0x104418 + base);
+       const struct nvkm_enum *en =
+               nvkm_enum_find(gp100_ce_launcherr_report, stat & 0x0000000f);
+       nvkm_warn(subdev, "LAUNCHERR %08x [%s]\n", stat, en ? en->name : "");
+}
+
+void
+gp100_ce_intr(struct nvkm_engine *ce)
+{
+       const u32 base = (ce->subdev.index - NVKM_ENGINE_CE0) * 0x80;
+       struct nvkm_subdev *subdev = &ce->subdev;
+       struct nvkm_device *device = subdev->device;
+       u32 mask = nvkm_rd32(device, 0x10440c + base);
+       u32 intr = nvkm_rd32(device, 0x104410 + base) & mask;
+       if (intr & 0x00000001) { //XXX: guess
+               nvkm_warn(subdev, "BLOCKPIPE\n");
+               nvkm_wr32(device, 0x104410 + base, 0x00000001);
+               intr &= ~0x00000001;
+       }
+       if (intr & 0x00000002) { //XXX: guess
+               nvkm_warn(subdev, "NONBLOCKPIPE\n");
+               nvkm_wr32(device, 0x104410 + base, 0x00000002);
+               intr &= ~0x00000002;
+       }
+       if (intr & 0x00000004) {
+               gp100_ce_intr_launcherr(ce, base);
+               nvkm_wr32(device, 0x104410 + base, 0x00000004);
+               intr &= ~0x00000004;
+       }
+       if (intr) {
+               nvkm_warn(subdev, "intr %08x\n", intr);
+               nvkm_wr32(device, 0x104410 + base, intr);
+       }
+}
+
+static const struct nvkm_engine_func
+gp100_ce = {
+       .intr = gp100_ce_intr,
+       .sclass = {
+               { -1, -1, PASCAL_DMA_COPY_A },
+               {}
+       }
+};
+
+int
+gp100_ce_new(struct nvkm_device *device, int index,
+            struct nvkm_engine **pengine)
+{
+       return nvkm_engine_new_(&gp100_ce, device, index, true, pengine);
+}
index a782ab4b30b526fa38b3fe7e2570869656bed0b0..94f4b2fa3d9acd4c6700eba9d756962401a22ff7 100644 (file)
@@ -2168,6 +2168,12 @@ nv130_chipset = {
        .pci = gp100_pci_new,
        .timer = gk20a_timer_new,
        .top = gk104_top_new,
+       .ce[0] = gp100_ce_new,
+       .ce[1] = gp100_ce_new,
+       .ce[2] = gp100_ce_new,
+       .ce[3] = gp100_ce_new,
+       .ce[4] = gp100_ce_new,
+       .ce[5] = gp100_ce_new,
        .dma = gf119_dma_new,
        .disp = gp100_disp_new,
        .fifo = gp100_fifo_new,