[COMMON] fimc-is2: add operation 'mode' to PHY type
authorJeongtae Park <jtp.park@samsung.com>
Thu, 26 Apr 2018 02:53:27 +0000 (11:53 +0900)
committerSunyoung Kang <sy0816.kang@samsung.com>
Mon, 23 Jul 2018 08:05:02 +0000 (17:05 +0900)
Change-Id: I31f33fa35263fff94b68b466f032c77b475057bc
Signed-off-by: Jeongtae Park <jtp.park@samsung.com>
drivers/media/platform/exynos/fimc-is2/sensor/csi2/fimc-is-hw-csi-v5_2.c

index 8b517a479f21690561ffa82acec6412e67c7e1d0..fed8eeb976db6e989fd4366a9c2c75b183cb961a 100644 (file)
@@ -979,8 +979,9 @@ int csi_hw_s_phy_set(struct phy *phy, u32 lanes, u32 mipi_speed,
        int ret = 0;
        unsigned int phy_cfg[MAX_PHY_CFG];
 
-       /* [0]: the version of PHY
-        * [1]: the type of PHY (D: 0, C: 1)
+       /*
+        * [0]: the version of PHY (major << 16 | minor)
+        * [1]: the type of PHY (mode << 16 | type)
         * [2]: the number of lanes (zero-based)
         * [3]: the data rate
         * [4]: the settle value for the data rate
@@ -991,7 +992,12 @@ int csi_hw_s_phy_set(struct phy *phy, u32 lanes, u32 mipi_speed,
        else
                phy_cfg[0] |= 0x0000;
 
-       phy_cfg[1] = 0xD;
+       phy_cfg[1] = 0xD << 16;
+       if ((instance == CSI_ID_A) || (instance == CSI_ID_C))
+               phy_cfg[1] |= 0xDC;
+       else
+               phy_cfg[1] |= 0xD;
+
        phy_cfg[2] = lanes;
        phy_cfg[3] = mipi_speed;
        phy_cfg[4] = settle;