* Look into engine reset on timeout errors. Should not be required.
*/
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/libata.h>
#define DRV_NAME "pata_hpt366"
-#define DRV_VERSION "0.6.10"
+#define DRV_VERSION "0.6.11"
struct hpt_clock {
u8 xfer_mode;
while (list[i] != NULL) {
if (!strcmp(list[i], model_num)) {
- pr_warning(DRV_NAME ": %s is not supported for %s.\n",
- modestr, list[i]);
+ pr_warn("%s is not supported for %s\n",
+ modestr, list[i]);
return 1;
}
i++;
* Look into engine reset on timeout errors. Should not be required.
*/
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/libata.h>
#define DRV_NAME "pata_hpt37x"
-#define DRV_VERSION "0.6.22"
+#define DRV_VERSION "0.6.23"
struct hpt_clock {
u8 xfer_speed;
while (list[i] != NULL) {
if (!strcmp(list[i], model_num)) {
- pr_warning(DRV_NAME ": %s is not supported for %s.\n",
- modestr, list[i]);
+ pr_warn("%s is not supported for %s\n",
+ modestr, list[i]);
return 1;
}
i++;
chip_table = &hpt372;
break;
default:
- pr_err(DRV_NAME ": Unknown HPT366 subtype, "
- "please report (%d).\n", rev);
+ pr_err("Unknown HPT366 subtype, please report (%d)\n",
+ rev);
return -ENODEV;
}
break;
*ppi = &info_hpt374_fn1;
break;
default:
- pr_err(DRV_NAME ": PCI table is bogus, please report (%d).\n",
- dev->device);
+ pr_err("PCI table is bogus, please report (%d)\n", dev->device);
return -ENODEV;
}
/* Ok so this is a chip we support */
u8 sr;
u32 total = 0;
- pr_warning(DRV_NAME ": BIOS has not set timing clocks.\n");
+ pr_warn("BIOS has not set timing clocks\n");
/* This is the process the HPT371 BIOS is reported to use */
for (i = 0; i < 128; i++) {
(f_high << 16) | f_low | 0x100);
}
if (adjust == 8) {
- pr_err(DRV_NAME ": DPLL did not stabilize!\n");
+ pr_err("DPLL did not stabilize!\n");
return -ENODEV;
}
if (dpll == 3)
else
private_data = (void *)hpt37x_timings_50;
- pr_info(DRV_NAME ": bus clock %dMHz, using %dMHz DPLL.\n",
+ pr_info("bus clock %dMHz, using %dMHz DPLL\n",
MHz[clock_slot], MHz[dpll]);
} else {
private_data = (void *)chip_table->clocks[clock_slot];
if (clock_slot < 2 && ppi[0] == &info_hpt370a)
ppi[0] = &info_hpt370a_33;
- pr_info(DRV_NAME ": %s using %dMHz bus clock.\n",
+ pr_info("%s using %dMHz bus clock\n",
chip_table->name, MHz[clock_slot]);
}
* Work out best PLL policy
*/
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/libata.h>
#define DRV_NAME "pata_hpt3x2n"
-#define DRV_VERSION "0.3.14"
+#define DRV_VERSION "0.3.15"
enum {
HPT_PCI_FAST = (1 << 31),
u16 sr;
u32 total = 0;
- pr_warning(DRV_NAME ": BIOS clock data not set.\n");
+ pr_warn("BIOS clock data not set\n");
/* This is the process the HPT371 BIOS is reported to use */
for (i = 0; i < 128; i++) {
ppi[0] = &info_hpt372n;
break;
default:
- pr_err(DRV_NAME ": PCI table is bogus, please report (%d).\n",
- dev->device);
+ pr_err("PCI table is bogus, please report (%d)\n", dev->device);
return -ENODEV;
}
pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low);
}
if (adjust == 8) {
- pr_err(DRV_NAME ": DPLL did not stabilize!\n");
+ pr_err("DPLL did not stabilize!\n");
return -ENODEV;
}
- pr_info(DRV_NAME ": bus clock %dMHz, using 66MHz DPLL.\n", pci_mhz);
+ pr_info("bus clock %dMHz, using 66MHz DPLL\n", pci_mhz);
/*
* Set our private data up. We only need a few flags