m68k: generalize io memory region setup for ColdFire ACR registers

The ACR registers of the ColdFire define at a macro level what regions
of the addresses space should have caching or other attribute types applied.

Currently for the MMU enabled setups we map the interal IO peripheral addres
space as uncachable based on the define for the MBAR address (CONFIG_MBAR).
Not all ColdFire SoC use a programmable MBAR register address. Some parts
have fixed addressing for their internal peripheral registers.

Generalize the way we get the internal peripheral base address so all types
can be accomodated in the ACR definitions. Each ColdFire SoC type now sets
its IO memory base and size definitions (which may be based on MBAR) which
are then used in the ACR definitions.

Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>

diff --git a/arch/m68k/include/asm/m5441xsim.h b/arch/m68k/include/asm/m5441xsim.h
index 4279c0df0844d3c2fe28079c7a79a2791daa990b..64f60be47066ead408dd1079a4daf40295727203 100644 (file)
--- a/arch/m68k/include/asm/m5441xsim.h
+++ b/arch/m68k/include/asm/m5441xsim.h
@@ -12,6 +12,8 @@
 #define MCF_BUSCLK             (MCF_CLK / 2)
 #define MACHINE                        MACH_M5441X
 #define FPUTYPE                        0
+#define IOMEMBASE              0xe0000000
+#define IOMEMSIZE              0x20000000
 
 #include <asm/m54xxacr.h>
 

diff --git a/arch/m68k/include/asm/m54xxacr.h b/arch/m68k/include/asm/m54xxacr.h
index 59e171063c2f1f846dcac7c4fc07eab2b26093fc..c6ac05cda282c791f0261dba9bed7b5ec6afad31 100644 (file)
--- a/arch/m68k/include/asm/m54xxacr.h
+++ b/arch/m68k/include/asm/m54xxacr.h
@@ -94,7 +94,7 @@
  *     register region as non-cacheable. And then we map all our RAM as
  *     cacheable and supervisor access only.
  */
-#define ACR0_MODE      (ACR_BA(CONFIG_MBAR)+ACR_ADMSK(0x1000000)+ \
+#define ACR0_MODE      (ACR_BA(IOMEMBASE)+ACR_ADMSK(IOMEMSIZE)+ \
                         ACR_ENABLE+ACR_SUPER+ACR_CM_OFF_PRE+ACR_SP)
 #if defined(CONFIG_CACHE_COPYBACK)
 #define ACR1_MODE      (ACR_BA(CONFIG_RAMBASE)+ACR_ADMSK(CONFIG_RAMSIZE)+ \

diff --git a/arch/m68k/include/asm/m54xxsim.h b/arch/m68k/include/asm/m54xxsim.h
index 7dd6cc4bcd72810232bd387a3e1a09c46387cac2..73d937ff36eb2d082daa4d3391bade142255faa7 100644 (file)
--- a/arch/m68k/include/asm/m54xxsim.h
+++ b/arch/m68k/include/asm/m54xxsim.h
@@ -10,6 +10,8 @@
 #define        MCF_BUSCLK              (MCF_CLK / 2)
 #define        MACHINE                 MACH_M54XX
 #define        FPUTYPE                 FPU_COLDFIRE
+#define        IOMEMBASE               MCF_MBAR
+#define        IOMEMSIZE               0x01000000
 
 #include <asm/m54xxacr.h>