#define ZX_GPIO_NR 16
struct zx_gpio {
- spinlock_t lock;
+ raw_spinlock_t lock;
void __iomem *base;
struct gpio_chip gc;
if (offset >= gc->ngpio)
return -EINVAL;
- spin_lock_irqsave(&chip->lock, flags);
+ raw_spin_lock_irqsave(&chip->lock, flags);
gpiodir = readw_relaxed(chip->base + ZX_GPIO_DIR);
gpiodir &= ~BIT(offset);
writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);
- spin_unlock_irqrestore(&chip->lock, flags);
+ raw_spin_unlock_irqrestore(&chip->lock, flags);
return 0;
}
if (offset >= gc->ngpio)
return -EINVAL;
- spin_lock_irqsave(&chip->lock, flags);
+ raw_spin_lock_irqsave(&chip->lock, flags);
gpiodir = readw_relaxed(chip->base + ZX_GPIO_DIR);
gpiodir |= BIT(offset);
writew_relaxed(gpiodir, chip->base + ZX_GPIO_DIR);
writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO1);
else
writew_relaxed(BIT(offset), chip->base + ZX_GPIO_DO0);
- spin_unlock_irqrestore(&chip->lock, flags);
+ raw_spin_unlock_irqrestore(&chip->lock, flags);
return 0;
}
if (offset < 0 || offset >= ZX_GPIO_NR)
return -EINVAL;
- spin_lock_irqsave(&chip->lock, flags);
+ raw_spin_lock_irqsave(&chip->lock, flags);
gpioiev = readw_relaxed(chip->base + ZX_GPIO_IV);
gpiois = readw_relaxed(chip->base + ZX_GPIO_IVE);
writew_relaxed(gpioi_epos, chip->base + ZX_GPIO_IEP);
writew_relaxed(gpioi_eneg, chip->base + ZX_GPIO_IEN);
writew_relaxed(gpioiev, chip->base + ZX_GPIO_IV);
- spin_unlock_irqrestore(&chip->lock, flags);
+ raw_spin_unlock_irqrestore(&chip->lock, flags);
return 0;
}
u16 mask = BIT(irqd_to_hwirq(d) % ZX_GPIO_NR);
u16 gpioie;
- spin_lock(&chip->lock);
+ raw_spin_lock(&chip->lock);
gpioie = readw_relaxed(chip->base + ZX_GPIO_IM) | mask;
writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);
gpioie = readw_relaxed(chip->base + ZX_GPIO_IE) & ~mask;
writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);
- spin_unlock(&chip->lock);
+ raw_spin_unlock(&chip->lock);
}
static void zx_irq_unmask(struct irq_data *d)
u16 mask = BIT(irqd_to_hwirq(d) % ZX_GPIO_NR);
u16 gpioie;
- spin_lock(&chip->lock);
+ raw_spin_lock(&chip->lock);
gpioie = readw_relaxed(chip->base + ZX_GPIO_IM) & ~mask;
writew_relaxed(gpioie, chip->base + ZX_GPIO_IM);
gpioie = readw_relaxed(chip->base + ZX_GPIO_IE) | mask;
writew_relaxed(gpioie, chip->base + ZX_GPIO_IE);
- spin_unlock(&chip->lock);
+ raw_spin_unlock(&chip->lock);
}
static struct irq_chip zx_irqchip = {
if (IS_ERR(chip->base))
return PTR_ERR(chip->base);
- spin_lock_init(&chip->lock);
+ raw_spin_lock_init(&chip->lock);
if (of_property_read_bool(dev->of_node, "gpio-ranges")) {
chip->gc.request = gpiochip_generic_request;
chip->gc.free = gpiochip_generic_free;