iommu/ipmmu-vmsa: Include SoC part number in DT binding docs
authorMagnus Damm <damm+renesas@opensource.se>
Tue, 17 Nov 2015 03:53:20 +0000 (12:53 +0900)
committerJoerg Roedel <jroedel@suse.de>
Thu, 26 Nov 2015 13:43:18 +0000 (14:43 +0100)
Add part numbers for APE6 and current set of R-Car Gen2 SoCs to the
IPMMU DT binding documentation. The example is also updated to show
how the generic compatible string may be used as fallback.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.txt

index cd29083e16ec76a39e5640332f5eebe145d15abe..48ffb38f699e18b3d3e10ebdf0c0f9fa3c5d409e 100644 (file)
@@ -7,7 +7,15 @@ connected to the IPMMU through a port called micro-TLB.
 
 Required Properties:
 
-  - compatible: Must contain "renesas,ipmmu-vmsa".
+  - compatible: Must contain SoC-specific and generic entries from below.
+
+    - "renesas,ipmmu-r8a73a4" for the R8A73A4 (R-Mobile APE6) IPMMU.
+    - "renesas,ipmmu-r8a7790" for the R8A7790 (R-Car H2) IPMMU.
+    - "renesas,ipmmu-r8a7791" for the R8A7791 (R-Car M2-W) IPMMU.
+    - "renesas,ipmmu-r8a7793" for the R8A7793 (R-Car M2-N) IPMMU.
+    - "renesas,ipmmu-r8a7794" for the R8A7794 (R-Car E2) IPMMU.
+    - "renesas,ipmmu-vmsa" for generic R-Car Gen2 VMSA-compatible IPMMU.
+
   - reg: Base address and size of the IPMMU registers.
   - interrupts: Specifiers for the MMU fault interrupts. For instances that
     support secure mode two interrupts must be specified, for non-secure and
@@ -27,7 +35,7 @@ node with the following property:
 Example: R8A7791 IPMMU-MX and VSP1-D0 bus master
 
        ipmmu_mx: mmu@fe951000 {
-               compatible = "renasas,ipmmu-vmsa";
+               compatible = "renasas,ipmmu-r8a7791", "renasas,ipmmu-vmsa";
                reg = <0 0xfe951000 0 0x1000>;
                interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
                             <0 221 IRQ_TYPE_LEVEL_HIGH>;