drm/i915: PSR: deprecate link_standby support for core platforms.

On Haswell and Broadwell with link in standby when exit event happens
between vblank and VSC packet, PSR exit on panel but DPA transmitter
still sends black pixel. When this condition hits, panel will intermittently
display black frame.

The known W/A for this case involve the of single_frame update
that isn't supported on Haswell and to be supported on Broadwell
3 other workarounds would be required. So it is better and safe to
just deprecate link_standby for now.

Also, link fully off saves more power than link_standby and afwk
no OEM is requesting link standby on VBT. There is no reason for that.

For Skylake let's just consider it behaves like Broadwell until
we prove otherwise.

v2: Fix commit message (Durga).

v3: Fix conflict with PSR2.

Reference: HSD: bdwgfx/1912559
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 23949247cf103142f3545bcc3a34813021452db8..07a71c0ff7756cefc3183bd93b4f899404af6262 100644 (file)
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2358,9 +2358,6 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
                }
        seq_puts(m, "\n");
 
-       seq_printf(m, "Link standby: %s\n",
-                  yesno((bool)dev_priv->psr.link_standby));
-
        /* CHV PSR has no kind of performance counter */
        if (HAS_DDI(dev)) {
                psrperf = I915_READ(EDP_PSR_PERF_CNT(dev)) &

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3b21249300581c0ca520fd521efd094d7d3585f3..37e74543ca16704b5fd733e466e26dd1c5faae82 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -881,7 +881,6 @@ struct i915_psr {
        bool active;
        struct delayed_work work;
        unsigned busy_frontbuffer_bits;
-       bool link_standby;
        bool psr2_support;
        bool aux_frame_sync;
 };

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 0e3b652b5946d7c4b7b7a15c2ae0e6bcce25bcec..5cd374b4a07ec7d73e6986dd070e0ad8afe1447f 100644 (file)
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -170,13 +170,8 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp)
 
        aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, 0);
 
-       /* Enable PSR in sink */
-       if (dev_priv->psr.link_standby)
-               drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,
-                                  DP_PSR_ENABLE | DP_PSR_MAIN_LINK_ACTIVE);
-       else
-               drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,
-                                  DP_PSR_ENABLE & ~DP_PSR_MAIN_LINK_ACTIVE);
+       drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG,
+                          DP_PSR_ENABLE & ~DP_PSR_MAIN_LINK_ACTIVE);
 
        /* Enable AUX frame sync at sink */
        if (dev_priv->psr.aux_frame_sync)
@@ -214,6 +209,8 @@ static void hsw_psr_enable_sink(struct intel_dp *intel_dp)
                   (precharge << DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT) |
                   (aux_clock_divider << DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT));
        }
+
+       drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, DP_PSR_ENABLE);
 }
 
 static void vlv_psr_enable_source(struct intel_dp *intel_dp)
@@ -264,9 +261,6 @@ static void hsw_psr_enable_source(struct intel_dp *intel_dp)
        uint32_t val = 0x0;
        const uint32_t link_entry_time = EDP_PSR_MIN_LINK_ENTRY_TIME_8_LINES;
 
-       if (dev_priv->psr.link_standby)
-               val |= EDP_PSR_LINK_STANDBY;
-
        if (intel_dp->psr_dpcd[1] & DP_PSR_NO_TRAIN_ON_EXIT) {
                /* It doesn't mean we shouldn't send TPS patters, so let's
                   send the minimal TP1 possible and skip TP2. */
@@ -325,6 +319,12 @@ static bool intel_psr_match_conditions(struct intel_dp *intel_dp)
                return false;
        }
 
+       if (!IS_VALLEYVIEW(dev) && ((dev_priv->vbt.psr.full_link) ||
+                                   (dig_port->port != PORT_A))) {
+               DRM_DEBUG_KMS("PSR condition failed: Link Standby requested/needed but not supported on this platform\n");
+               return false;
+       }
+
        dev_priv->psr.source_ok = true;
        return true;
 }
@@ -384,12 +384,6 @@ void intel_psr_enable(struct intel_dp *intel_dp)
        if (!intel_psr_match_conditions(intel_dp))
                goto unlock;
 
-       /* First we check VBT, but we must respect sink and source
-        * known restrictions */
-       dev_priv->psr.link_standby = dev_priv->vbt.psr.full_link;
-       if (IS_BROADWELL(dev) && intel_dig_port->port != PORT_A)
-               dev_priv->psr.link_standby = true;
-
        dev_priv->psr.busy_frontbuffer_bits = 0;
 
        if (HAS_DDI(dev)) {