microblaze: Unprivileged stream instruction awareness

Add cpuinfo support for the new MicroBlaze option permitting userspace
(unprivileged) access to the streaming instructions (FSL / AXI-stream).

Emit a noisy warning at bootup if this is enabled, because bad user code
can potentially lockup the CPU.

Signed-off-by: John A. Williams <john.williams@petalogix.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>

diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h
index d8f013347a9e63c617ccf3d46c78fb582cf42ddf..7d6831ac8a46eec66c4f1fc00ac28aa48000ed64 100644 (file)
--- a/arch/microblaze/include/asm/cpuinfo.h
+++ b/arch/microblaze/include/asm/cpuinfo.h
@@ -38,6 +38,7 @@ struct cpuinfo {
        u32 use_exc;
        u32 ver_code;
        u32 mmu;
+       u32 mmu_privins;
        u32 endian;
 
        /* CPU caches */

diff --git a/arch/microblaze/include/asm/pvr.h b/arch/microblaze/include/asm/pvr.h
index 56a80e45c4e282e96439f1134a7e0b64f0bc6986..4bbdb4c03b57837d5df1e4bfb91258ef7e5eeb65 100644 (file)
--- a/arch/microblaze/include/asm/pvr.h
+++ b/arch/microblaze/include/asm/pvr.h
@@ -117,10 +117,10 @@ struct pvr_s {
 #define PVR11_MMU_DTLB_SIZE            0x07000000
 #define PVR11_MMU_TLB_ACCESS           0x00C00000
 #define PVR11_MMU_ZONES                        0x003C0000
+#define PVR11_MMU_PRIVINS              0x00010000
 /* MSR Reset value PVR mask */
 #define PVR11_MSR_RESET_VALUE_MASK     0x000007FF
 
-
 /* PVR access macros */
 #define PVR_IS_FULL(_pvr)      (_pvr.pvr[0] & PVR0_PVR_FULL_MASK)
 #define PVR_USE_BARREL(_pvr)   (_pvr.pvr[0] & PVR0_USE_BARREL_MASK)
@@ -216,6 +216,7 @@ struct pvr_s {
 #define PVR_MMU_DTLB_SIZE(_pvr)                (_pvr.pvr[11] & PVR11_MMU_DTLB_SIZE)
 #define PVR_MMU_TLB_ACCESS(_pvr)       (_pvr.pvr[11] & PVR11_MMU_TLB_ACCESS)
 #define PVR_MMU_ZONES(_pvr)            (_pvr.pvr[11] & PVR11_MMU_ZONES)
+#define PVR_MMU_PRIVINS(pvr)           (pvr.pvr[11] & PVR11_MMU_PRIVINS)
 
 /* endian */
 #define PVR_ENDIAN(_pvr)       (_pvr.pvr[0] & PVR0_ENDI)

diff --git a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
index f70a6047f08e3e581b32dd65866ad4ebf45e5423..916aaedf1945df8880e3a99066358b0105041d1d 100644 (file)
--- a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
@@ -72,6 +72,7 @@ void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu)
        CI(pvr_user2, USER2);
 
        CI(mmu, USE_MMU);
+       CI(mmu_privins, MMU_PRIVINS);
        CI(endian, ENDIAN);
 
        CI(use_icache, USE_ICACHE);

diff --git a/arch/microblaze/kernel/cpu/cpuinfo-static.c b/arch/microblaze/kernel/cpu/cpuinfo-static.c
index b16b994ca3d25b81165b1d95492e0c550cc9d14e..592bb2e838c4f5e0d0d25685d59373a73b7a579a 100644 (file)
--- a/arch/microblaze/kernel/cpu/cpuinfo-static.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo-static.c
@@ -119,6 +119,7 @@ void __init set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu)
        ci->pvr_user2 = fcpu(cpu, "xlnx,pvr-user2");
 
        ci->mmu = fcpu(cpu, "xlnx,use-mmu");
+       ci->mmu_privins = fcpu(cpu, "xlnx,mmu-privileged-instr");
        ci->endian = fcpu(cpu, "xlnx,endianness");
 
        ci->ver_code = 0;

diff --git a/arch/microblaze/kernel/cpu/cpuinfo.c b/arch/microblaze/kernel/cpu/cpuinfo.c
index c1640c52711fe9a056ebd63450c51e54ad26d5d2..44394d80a6836c4118254eab4ce24d7b9c2b91ab 100644 (file)
--- a/arch/microblaze/kernel/cpu/cpuinfo.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo.c
@@ -88,4 +88,8 @@ void __init setup_cpuinfo(void)
                printk(KERN_WARNING "%s: Unsupported PVR setting\n", __func__);
                set_cpuinfo_static(&cpuinfo, cpu);
        }
+
+       if (cpuinfo.mmu_privins)
+               printk(KERN_WARNING "%s: Stream instructions enabled"
+                       " - USERSPACE CAN LOCK THIS KERNEL!\n", __func__);
 }

diff --git a/arch/microblaze/kernel/cpu/mb.c b/arch/microblaze/kernel/cpu/mb.c
index b4048af026158e79c1422b0553d540d30f53da13..0afebaebb5b5eb34aca1408df2ff3d6993a79f4e 100644 (file)
--- a/arch/microblaze/kernel/cpu/mb.c
+++ b/arch/microblaze/kernel/cpu/mb.c
@@ -97,6 +97,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                (cpuinfo.use_exc & PVR2_FPU_EXC_MASK) ? "fpu " : "",
                (cpuinfo.use_exc & PVR2_USE_FSL_EXC) ? "fsl " : "");
 
+       count += seq_printf(m,
+                       "Stream-insns:\t%sprivileged\n",
+                       cpuinfo.mmu_privins ? "un" : "");
+
        if (cpuinfo.use_icache)
                count += seq_printf(m,
                                "Icache:\t\t%ukB\tline length:\t%dB\n",