[COMMON] i2c: exynos5: Fix Enable IRQ sequence
authorKyungwoo Kang <kwoo.kang@samsung.com>
Fri, 20 Oct 2017 05:27:07 +0000 (14:27 +0900)
committermyung-su.cha <myung-su.cha@samsung.com>
Wed, 9 May 2018 12:14:45 +0000 (21:14 +0900)
By architectual guide, IRQ_EN SFR must be set before Master runs.
Previously this sequeuce has been opposite.

Change-Id: I04997171ae5c28a4ca0e6aacd317ddd5fed61dd2
Signed-off-by: Kyungwoo Kang <kwoo.kang@samsung.com>
drivers/i2c/busses/i2c-exynos5.c

index 1cae64aa3d685169a498d5a14a47c5e3615461fe..fe9cf3095646e941fecba452e10f02dece6aa736 100644 (file)
@@ -657,14 +657,6 @@ static int exynos5_i2c_xfer_msg(struct exynos5_i2c *i2c,
 
        writel(i2c_ctl, i2c->regs + HSI2C_CTL);
 
-       i2c_auto_conf &= ~(0xffff);
-       i2c_auto_conf |= i2c->msg->len;
-       writel(i2c_auto_conf, i2c->regs + HSI2C_AUTO_CONF);
-
-       i2c_auto_conf = readl(i2c->regs + HSI2C_AUTO_CONF);
-       i2c_auto_conf |= HSI2C_MASTER_RUN;
-       writel(i2c_auto_conf, i2c->regs + HSI2C_AUTO_CONF);
-
        if (operation_mode == HSI2C_INTERRUPT) {
                unsigned int cpu = raw_smp_processor_id();
                i2c_int_en |= HSI2C_INT_CHK_TRANS_STATE | HSI2C_INT_TRANSFER_DONE;
@@ -676,6 +668,14 @@ static int exynos5_i2c_xfer_msg(struct exynos5_i2c *i2c,
                writel(HSI2C_INT_TRANSFER_DONE, i2c->regs + HSI2C_INT_ENABLE);
        }
 
+       i2c_auto_conf &= ~(0xffff);
+       i2c_auto_conf |= i2c->msg->len;
+       writel(i2c_auto_conf, i2c->regs + HSI2C_AUTO_CONF);
+
+       i2c_auto_conf = readl(i2c->regs + HSI2C_AUTO_CONF);
+       i2c_auto_conf |= HSI2C_MASTER_RUN;
+       writel(i2c_auto_conf, i2c->regs + HSI2C_AUTO_CONF);
+
        ret = -EAGAIN;
        if (msgs->flags & I2C_M_RD) {
                if (operation_mode == HSI2C_POLLING) {