drm/i915: Fix DEIER and GTIER collecting for BDW.

BDW has many other Display Engine interrupts and GT interrupts registers.
Collecting it properly on gpu_error_state.

On debugfs all was properly listed already but besides we were also listing old
DEIER and GTIER that doesn't exist on BDW anymore. This was causing
unclaimed register messages

v2: Fix small issues of first version and don't read DEIER regs when pipe's
    power well is disabled
v3: bikeshed accepted: use enum pipe pipe instead of int i for pipe interection
v4: Ben notice previous version was checking for display_power_enabled without
    using propper locks. Using _unlocked version isn't reliable and we cannot
    get this registers when power well is off. So let's avoid getting all DE_IER
    per pipe for now. If someone think this is an useful information it can be
    added later.
v5: Ben: put back debugfs stuff that might be coverred by pm_get and use
    	 gen >= 8 trying to predict future.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=81701
Cc: Ben Widawsky <ben@bwidawsk.net>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: (v3) Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ccb97f1f8660139751a2c3217d9fbbd75933cbae..c70b2b67282e4214d66402ccfe4587835e77e7e6 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -314,7 +314,7 @@ struct drm_i915_error_state {
        u32 eir;
        u32 pgtbl_er;
        u32 ier;
-       u32 gtier;
+       u32 gtier[4];
        u32 ccid;
        u32 derrmr;
        u32 forcewake;

diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 7c478e6cedaec2195519f9fe6cf4c708a663ea1c..eab41f9390f8c3bd1907c7625488c977a910ead3 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -361,8 +361,12 @@ int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
        err_printf(m, "PCI ID: 0x%04x\n", dev->pdev->device);
        err_printf(m, "EIR: 0x%08x\n", error->eir);
        err_printf(m, "IER: 0x%08x\n", error->ier);
-       if (HAS_PCH_SPLIT(dev) || IS_VALLEYVIEW(dev))
-               err_printf(m, "GTIER: 0x%08x\n", error->gtier);
+       if (INTEL_INFO(dev)->gen >= 8) {
+               for (i = 0; i < 4; i++)
+                       err_printf(m, "GTIER gt %d: 0x%08x\n", i,
+                                  error->gtier[i]);
+       } else if (HAS_PCH_SPLIT(dev) || IS_VALLEYVIEW(dev))
+               err_printf(m, "GTIER: 0x%08x\n", error->gtier[0]);
        err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
        err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
        err_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
@@ -1096,6 +1100,7 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
                                   struct drm_i915_error_state *error)
 {
        struct drm_device *dev = dev_priv->dev;
+       int i;
 
        /* General organization
         * 1. Registers specific to a single generation
@@ -1107,7 +1112,7 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
 
        /* 1: Registers specific to a single generation */
        if (IS_VALLEYVIEW(dev)) {
-               error->gtier = I915_READ(GTIER);
+               error->gtier[0] = I915_READ(GTIER);
                error->ier = I915_READ(VLV_IER);
                error->forcewake = I915_READ(FORCEWAKE_VLV);
        }
@@ -1141,9 +1146,13 @@ static void i915_capture_reg_state(struct drm_i915_private *dev_priv,
        if (HAS_HW_CONTEXTS(dev))
                error->ccid = I915_READ(CCID);
 
-       if (HAS_PCH_SPLIT(dev)) {
+       if (INTEL_INFO(dev)->gen >= 8) {
+               error->ier = I915_READ(GEN8_DE_MISC_IER);
+               for (i = 0; i < 4; i++)
+                       error->gtier[i] = I915_READ(GEN8_GT_IER(i));
+       } else if (HAS_PCH_SPLIT(dev)) {
                error->ier = I915_READ(DEIER);
-               error->gtier = I915_READ(GTIER);
+               error->gtier[0] = I915_READ(GTIER);
        } else if (IS_GEN2(dev)) {
                error->ier = I915_READ16(IER);
        } else if (!IS_VALLEYVIEW(dev)) {