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pinctrl-sunxi: Fix sun5i-a13 port F multiplexing
authorHans de Goede <hdegoede@redhat.com>
Mon, 17 Feb 2014 21:19:41 +0000 (22:19 +0100)
committerLinus Walleij <linus.walleij@linaro.org>
Tue, 25 Feb 2014 09:49:14 +0000 (10:49 +0100)
The correct value for selecting the mmc0 function on port F pins is 2 not 4,
as per the data-sheet:
http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/pinctrl-sunxi-pins.h patch | blob | blame | history

diff --git a/drivers/pinctrl/pinctrl-sunxi-pins.h b/drivers/pinctrl/pinctrl-sunxi-pins.h
index 6fd8d4d951406aec5f01c021c2c80b84ebf4f4b0..3d6066988a7251cc0e234c8033dde50aff79ae0f 100644 (file)
--- a/drivers/pinctrl/pinctrl-sunxi-pins.h
+++ b/drivers/pinctrl/pinctrl-sunxi-pins.h
@@ -1932,27 +1932,27 @@ static const struct sunxi_desc_pin sun5i_a13_pins[] = {
        SUNXI_PIN(SUNXI_PINCTRL_PIN_PF0,
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
-                 SUNXI_FUNCTION(0x4, "mmc0")),         /* D1 */
+                 SUNXI_FUNCTION(0x2, "mmc0")),         /* D1 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN_PF1,
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
-                 SUNXI_FUNCTION(0x4, "mmc0")),         /* D0 */
+                 SUNXI_FUNCTION(0x2, "mmc0")),         /* D0 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN_PF2,
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
-                 SUNXI_FUNCTION(0x4, "mmc0")),         /* CLK */
+                 SUNXI_FUNCTION(0x2, "mmc0")),         /* CLK */
        SUNXI_PIN(SUNXI_PINCTRL_PIN_PF3,
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
-                 SUNXI_FUNCTION(0x4, "mmc0")),         /* CMD */
+                 SUNXI_FUNCTION(0x2, "mmc0")),         /* CMD */
        SUNXI_PIN(SUNXI_PINCTRL_PIN_PF4,
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
-                 SUNXI_FUNCTION(0x4, "mmc0")),         /* D3 */
+                 SUNXI_FUNCTION(0x2, "mmc0")),         /* D3 */
        SUNXI_PIN(SUNXI_PINCTRL_PIN_PF5,
                  SUNXI_FUNCTION(0x0, "gpio_in"),
                  SUNXI_FUNCTION(0x1, "gpio_out"),
-                 SUNXI_FUNCTION(0x4, "mmc0")),         /* D2 */
+                 SUNXI_FUNCTION(0x2, "mmc0")),         /* D2 */
        /* Hole */
        SUNXI_PIN(SUNXI_PINCTRL_PIN_PG0,
                  SUNXI_FUNCTION(0x0, "gpio_in"),