ARM: dts: Fix dm814x control base to properly initialize Ethernet PHY

Looks like I made a typo on the control base, all the 81xx
SoCs have it at 0x48140000 base. We've just gotten away with
the typo as the Ethernet phy was configured by the bootloader
on my test system and we're not yet using the pinctrl.

In addition to fixing the contol base, we need to also use the
right Ethernet phy flags to initialize it. And we are still
missing the PLL driver for dm814x and only relying on the
divider and mux clocks.

Fixes: f3d953ea3721 ("ARM: dts: Add minimal dm814x support")
Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/dm8148-evm.dts b/arch/arm/boot/dts/dm8148-evm.dts
index 92bacd3c8fab9f2730cbf53290de11b8f55372c3..109fd4711647ab7e170d506e75592e7d47cc9bcc 100644 (file)
--- a/arch/arm/boot/dts/dm8148-evm.dts
+++ b/arch/arm/boot/dts/dm8148-evm.dts
@@ -19,10 +19,10 @@
 
 &cpsw_emac0 {
        phy_id = <&davinci_mdio>, <0>;
-       phy-mode = "mii";
+       phy-mode = "rgmii";
 };
 
 &cpsw_emac1 {
        phy_id = <&davinci_mdio>, <1>;
-       phy-mode = "mii";
+       phy-mode = "rgmii";
 };

diff --git a/arch/arm/boot/dts/dm8148-t410.dts b/arch/arm/boot/dts/dm8148-t410.dts
index 8c4bbc7573df812c0e8461224ccd0f01e742c5a2..aecd7dfa2edaaa12060cccb9182df14568efe5e7 100644 (file)
--- a/arch/arm/boot/dts/dm8148-t410.dts
+++ b/arch/arm/boot/dts/dm8148-t410.dts
@@ -19,10 +19,10 @@
 
 &cpsw_emac0 {
        phy_id = <&davinci_mdio>, <0>;
-       phy-mode = "mii";
+       phy-mode = "rgmii";
 };
 
 &cpsw_emac1 {
        phy_id = <&davinci_mdio>, <1>;
-       phy-mode = "mii";
+       phy-mode = "rgmii";
 };

diff --git a/arch/arm/boot/dts/dm814x.dtsi b/arch/arm/boot/dts/dm814x.dtsi
index 972c9c9e885b0566e1c0b6b365f4be81780289a8..7988b42e57640584df8f8c459f6ff6652e325ed6 100644 (file)
--- a/arch/arm/boot/dts/dm814x.dtsi
+++ b/arch/arm/boot/dts/dm814x.dtsi
@@ -181,9 +181,9 @@
                                ti,hwmods = "timer3";
                        };
 
-                       control: control@160000 {
+                       control: control@140000 {
                                compatible = "ti,dm814-scm", "simple-bus";
-                               reg = <0x160000 0x16d000>;
+                               reg = <0x140000 0x16d000>;
                                #address-cells = <1>;
                                #size-cells = <1>;
                                ranges = <0 0x160000 0x16d000>;
@@ -321,9 +321,9 @@
                                mac-address = [ 00 00 00 00 00 00 ];
                        };
 
-                       phy_sel: cpsw-phy-sel@0x48160650 {
+                       phy_sel: cpsw-phy-sel@48140650 {
                                compatible = "ti,am3352-cpsw-phy-sel";
-                               reg= <0x48160650 0x4>;
+                               reg= <0x48140650 0x4>;
                                reg-names = "gmii-sel";
                        };
                };