arm64: kernel: Move config_sctlr_el1
authorJames Morse <james.morse@arm.com>
Tue, 21 Jul 2015 12:23:27 +0000 (13:23 +0100)
committerWill Deacon <will.deacon@arm.com>
Mon, 27 Jul 2015 10:08:41 +0000 (11:08 +0100)
Later patches need config_sctlr_el1 to set/clear bits in the sctlr_el1
register.

This patch moves this function into header a file.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/include/asm/cputype.h
arch/arm64/include/asm/sysreg.h
arch/arm64/kernel/armv8_deprecated.c

index a84ec605bed8190ed90f6a47e09315b21327875b..ee6403df9fe4c1f32e9a7b30172a7a141056ec40 100644 (file)
@@ -81,9 +81,6 @@
 #define ID_AA64MMFR0_BIGEND(mmfr0)     \
        (((mmfr0) & ID_AA64MMFR0_BIGEND_MASK) >> ID_AA64MMFR0_BIGEND_SHIFT)
 
-#define SCTLR_EL1_CP15BEN      (0x1 << 5)
-#define SCTLR_EL1_SED          (0x1 << 8)
-
 #ifndef __ASSEMBLY__
 
 /*
index 5c89df0acbcb2694890c671682a9dc5c9e40d339..56391fbae1e11625280614d6e7e75abd77111274 100644 (file)
@@ -20,6 +20,9 @@
 #ifndef __ASM_SYSREG_H
 #define __ASM_SYSREG_H
 
+#define SCTLR_EL1_CP15BEN      (0x1 << 5)
+#define SCTLR_EL1_SED          (0x1 << 8)
+
 #define sys_reg(op0, op1, crn, crm, op2) \
        ((((op0)-2)<<19)|((op1)<<16)|((crn)<<12)|((crm)<<8)|((op2)<<5))
 
@@ -55,6 +58,15 @@ asm(
 "      .endm\n"
 );
 
+static inline void config_sctlr_el1(u32 clear, u32 set)
+{
+       u32 val;
+
+       asm volatile("mrs %0, sctlr_el1" : "=r" (val));
+       val &= ~clear;
+       val |= set;
+       asm volatile("msr sctlr_el1, %0" : : "r" (val));
+}
 #endif
 
 #endif /* __ASM_SYSREG_H */
index 7922c2e710cadfc479a41a8008e02b25942f2751..78d56bff91fd2dca66f4549628348f29b4eaa7dc 100644 (file)
@@ -16,6 +16,7 @@
 
 #include <asm/insn.h>
 #include <asm/opcodes.h>
+#include <asm/sysreg.h>
 #include <asm/system_misc.h>
 #include <asm/traps.h>
 #include <asm/uaccess.h>
@@ -504,16 +505,6 @@ ret:
        return 0;
 }
 
-static inline void config_sctlr_el1(u32 clear, u32 set)
-{
-       u32 val;
-
-       asm volatile("mrs %0, sctlr_el1" : "=r" (val));
-       val &= ~clear;
-       val |= set;
-       asm volatile("msr sctlr_el1, %0" : : "r" (val));
-}
-
 static int cp15_barrier_set_hw_mode(bool enable)
 {
        if (enable)