ARM: EXYNOS: Fix i2c suspend/resume for legacy controller
authorAbhilash Kesavan <a.kesavan@samsung.com>
Tue, 20 Nov 2012 09:20:45 +0000 (18:20 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Tue, 20 Nov 2012 09:21:03 +0000 (18:21 +0900)
On resuming from suspend the i2c configuration register that is part
of system controller resets to 0xf. This sets the interrupt source to
the new high speed i2c rather than the legacy one that we are using.
Save and restore the I2C_CFG register for exynos5 to fix this.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-exynos/pm.c

index c06c992943a139bc3017854b19c4eba1cb09d4c5..8306c5276d1c062e3eb96da54ef257188aab9701 100644 (file)
@@ -62,6 +62,10 @@ static struct sleep_save exynos4_vpll_save[] = {
        SAVE_ITEM(EXYNOS4_VPLL_CON1),
 };
 
+static struct sleep_save exynos5_sys_save[] = {
+       SAVE_ITEM(EXYNOS5_SYS_I2C_CFG),
+};
+
 static struct sleep_save exynos_core_save[] = {
        /* SROM side */
        SAVE_ITEM(S5P_SROM_BW),
@@ -98,6 +102,7 @@ static void exynos_pm_prepare(void)
                s3c_pm_do_save(exynos4_epll_save, ARRAY_SIZE(exynos4_epll_save));
                s3c_pm_do_save(exynos4_vpll_save, ARRAY_SIZE(exynos4_vpll_save));
        } else {
+               s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
                /* Disable USE_RETENTION of JPEG_MEM_OPTION */
                tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);
                tmp &= ~EXYNOS5_OPTION_USE_RETENTION;
@@ -301,6 +306,10 @@ static void exynos_pm_resume(void)
        __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION);
        __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION);
 
+       if (soc_is_exynos5250())
+               s3c_pm_do_restore(exynos5_sys_save,
+                       ARRAY_SIZE(exynos5_sys_save));
+
        s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));
 
        if (!soc_is_exynos5250()) {