dt-bindings: display: display-timing: Add property to configure sync drive edge
authorPeter Ujfalusi <peter.ujfalusi@ti.com>
Thu, 22 Sep 2016 10:35:24 +0000 (13:35 +0300)
committerTomi Valkeinen <tomi.valkeinen@ti.com>
Wed, 2 Nov 2016 08:48:18 +0000 (10:48 +0200)
There are display panels which demands that the sync signal is driven on
different edge than the pixel data.
With the syncclk-active property we can specify the clk edge to be used to
drive the sync signal. When the property is missing it indicates that the
sync is driven on the same edge as the pixel data.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
CC: Rob Herring <robh+dt@kernel.org>
CC: Mark Rutland <mark.rutland@arm.com>
CC: devicetree@vger.kernel.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Documentation/devicetree/bindings/display/panel/display-timing.txt

index e1d4a0b596128b0060bd5df2fa21bd16e542540f..81a75893d1b82db911b22c3a8e6bf194ffdf85c2 100644 (file)
@@ -32,6 +32,14 @@ optional properties:
                        - active low  = drive pixel data on falling edge/
                                        sample data on rising edge
                        - ignored     = ignored
+ - syncclk-active: with
+                       - active high = drive sync on rising edge/
+                                       sample sync on falling edge of pixel
+                                       clock
+                       - active low  = drive sync on falling edge/
+                                       sample sync on rising edge of pixel
+                                       clock
+                       - omitted     = same configuration as pixelclk-active
  - interlaced (bool): boolean to enable interlaced mode
  - doublescan (bool): boolean to enable doublescan mode
  - doubleclk (bool): boolean to enable doubleclock mode