i40e: add checks for AQ error status bits
authorShannon Nelson <shannon.nelson@intel.com>
Tue, 20 May 2014 08:01:35 +0000 (08:01 +0000)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Mon, 9 Jun 2014 05:50:53 +0000 (22:50 -0700)
Check for error status bits on the AdminQ event queue and announce them
if seen.  If the Firmware sets these bits, it will trigger an AdminQ
interrupt to get the driver's attention to process the ARQ, which will
likely be enough to clear the actual issue.

Signed-off-by: Shannon Nelson <shannon.nelson@intel.com>
Change-ID: I009e0ebc8be764e40e193b29aed2863f43eb5cb0
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/i40e/i40e_main.c

index 8c16e185de812ef63a923e2252085602b0cdb06d..ab0b6e101c1b76ab2eaac39b9b2bc1acf6dd1ca3 100644 (file)
@@ -5132,11 +5132,47 @@ static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
        u16 pending, i = 0;
        i40e_status ret;
        u16 opcode;
+       u32 oldval;
        u32 val;
 
        if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state))
                return;
 
+       /* check for error indications */
+       val = rd32(&pf->hw, pf->hw.aq.arq.len);
+       oldval = val;
+       if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
+               dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
+               val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
+       }
+       if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
+               dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
+               val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
+       }
+       if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
+               dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
+               val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
+       }
+       if (oldval != val)
+               wr32(&pf->hw, pf->hw.aq.arq.len, val);
+
+       val = rd32(&pf->hw, pf->hw.aq.asq.len);
+       oldval = val;
+       if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
+               dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
+               val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
+       }
+       if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
+               dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
+               val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
+       }
+       if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
+               dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
+               val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
+       }
+       if (oldval != val)
+               wr32(&pf->hw, pf->hw.aq.asq.len, val);
+
        event.msg_size = I40E_MAX_AQ_BUF_SIZE;
        event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL);
        if (!event.msg_buf)