arm64: dts: exynos: Use human-friendly symbols for interrupt properties in exynos7
authorKrzysztof Kozlowski <krzk@kernel.org>
Fri, 16 Sep 2016 21:41:56 +0000 (23:41 +0200)
committerKrzysztof Kozlowski <krzk@kernel.org>
Thu, 3 Nov 2016 20:40:39 +0000 (22:40 +0200)
Replace hard-coded values of type of GIC interrupt and its flags with
respective macros from header to increase code readability

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
arch/arm64/boot/dts/exynos/exynos7.dtsi

index 20f10e0f7c772c9043383ee4388c59366ff716e7..82321984e1fb4d7decf86334cf0e6b878936f667 100644 (file)
                interrupt-controller;
                interrupt-parent = <&gic>;
                #interrupt-cells = <2>;
-               interrupts = <0 0 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 1 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 2 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 3 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 4 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 5 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 6 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 7 IRQ_TYPE_LEVEL_HIGH>;
+               interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        gpa1: gpa1 {
                interrupt-controller;
                interrupt-parent = <&gic>;
                #interrupt-cells = <2>;
-               interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 9 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 10 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 11 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 12 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 13 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 14 IRQ_TYPE_LEVEL_HIGH>,
-                            <0 15 IRQ_TYPE_LEVEL_HIGH>;
+               interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
        };
 
        gpa2: gpa2 {
index 0a80dabfbe95e1abd8832caddda5b1936d1a53ee..4b5a1eadffb5721e6977b34deb7f382cba043d7b 100644 (file)
                        pdma0: pdma@10E10000 {
                                compatible = "arm,pl330", "arm,primecell";
                                reg = <0x10E10000 0x1000>;
-                               interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clock_fsys0 ACLK_PDMA0>;
                                clock-names = "apb_pclk";
                                #dma-cells = <1>;
                        pdma1: pdma@10EB0000 {
                                compatible = "arm,pl330", "arm,primecell";
                                reg = <0x10EB0000 0x1000>;
-                               interrupts = <0 226 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&clock_fsys0 ACLK_PDMA1>;
                                clock-names = "apb_pclk";
                                #dma-cells = <1>;
                serial_0: serial@13630000 {
                        compatible = "samsung,exynos4210-uart";
                        reg = <0x13630000 0x100>;
-                       interrupts = <0 440 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 440 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_peric0 PCLK_UART0>,
                                 <&clock_peric0 SCLK_UART0>;
                        clock-names = "uart", "clk_uart_baud0";
                serial_1: serial@14c20000 {
                        compatible = "samsung,exynos4210-uart";
                        reg = <0x14c20000 0x100>;
-                       interrupts = <0 456 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_peric1 PCLK_UART1>,
                                 <&clock_peric1 SCLK_UART1>;
                        clock-names = "uart", "clk_uart_baud0";
                serial_2: serial@14c30000 {
                        compatible = "samsung,exynos4210-uart";
                        reg = <0x14c30000 0x100>;
-                       interrupts = <0 457 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_peric1 PCLK_UART2>,
                                 <&clock_peric1 SCLK_UART2>;
                        clock-names = "uart", "clk_uart_baud0";
                serial_3: serial@14c40000 {
                        compatible = "samsung,exynos4210-uart";
                        reg = <0x14c40000 0x100>;
-                       interrupts = <0 458 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_peric1 PCLK_UART3>,
                                 <&clock_peric1 SCLK_UART3>;
                        clock-names = "uart", "clk_uart_baud0";
                        wakeup-interrupt-controller {
                                compatible = "samsung,exynos7-wakeup-eint";
                                interrupt-parent = <&gic>;
-                               interrupts = <0 16 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
                        };
                };
 
                pinctrl_bus0: pinctrl@13470000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x13470000 0x1000>;
-                       interrupts = <0 383 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                pinctrl_nfc: pinctrl@14cd0000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x14cd0000 0x1000>;
-                       interrupts = <0 473 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                pinctrl_touch: pinctrl@14ce0000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x14ce0000 0x1000>;
-                       interrupts = <0 474 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                pinctrl_ff: pinctrl@14c90000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x14c90000 0x1000>;
-                       interrupts = <0 475 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                pinctrl_ese: pinctrl@14ca0000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x14ca0000 0x1000>;
-                       interrupts = <0 476 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                pinctrl_fsys0: pinctrl@10e60000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x10e60000 0x1000>;
-                       interrupts = <0 221 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                pinctrl_fsys1: pinctrl@15690000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x15690000 0x1000>;
-                       interrupts = <0 203 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                pinctrl_bus1: pinctrl@14870000 {
                        compatible = "samsung,exynos7-pinctrl";
                        reg = <0x14870000 0x1000>;
-                       interrupts = <0 384 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>;
                };
 
                hsi2c_0: hsi2c@13640000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x13640000 0x1000>;
-                       interrupts = <0 441 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 441 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
                hsi2c_1: hsi2c@13650000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x13650000 0x1000>;
-                       interrupts = <0 442 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 442 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
                hsi2c_2: hsi2c@14e60000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x14e60000 0x1000>;
-                       interrupts = <0 459 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
                hsi2c_3: hsi2c@14e70000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x14e70000 0x1000>;
-                       interrupts = <0 460 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
                hsi2c_4: hsi2c@13660000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x13660000 0x1000>;
-                       interrupts = <0 443 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 443 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
                hsi2c_5: hsi2c@13670000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x13670000 0x1000>;
-                       interrupts = <0 444 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
                hsi2c_6: hsi2c@14e00000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x14e00000 0x1000>;
-                       interrupts = <0 461 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
                hsi2c_7: hsi2c@13e10000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x13e10000 0x1000>;
-                       interrupts = <0 462 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
                hsi2c_8: hsi2c@14e20000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x14e20000 0x1000>;
-                       interrupts = <0 463 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
                hsi2c_9: hsi2c@13680000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x13680000 0x1000>;
-                       interrupts = <0 445 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
                hsi2c_10: hsi2c@13690000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x13690000 0x1000>;
-                       interrupts = <0 446 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
                hsi2c_11: hsi2c@136a0000 {
                        compatible = "samsung,exynos7-hsi2c";
                        reg = <0x136a0000 0x1000>;
-                       interrupts = <0 447 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 447 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        pinctrl-names = "default";
                rtc: rtc@10590000 {
                        compatible = "samsung,s3c6410-rtc";
                        reg = <0x10590000 0x100>;
-                       interrupts = <0 355 IRQ_TYPE_LEVEL_HIGH>,
-                                    <0 356 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_ccore PCLK_RTC>;
                        clock-names = "rtc";
                        status = "disabled";
                watchdog: watchdog@101d0000 {
                        compatible = "samsung,exynos7-wdt";
                        reg = <0x101d0000 0x100>;
-                       interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_peris PCLK_WDT>;
                        clock-names = "watchdog";
                        samsung,syscon-phandle = <&pmu_system_controller>;
 
                mmc_0: mmc@15740000 {
                        compatible = "samsung,exynos7-dw-mshc-smu";
-                       interrupts = <0 201 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0x15740000 0x2000>;
 
                mmc_1: mmc@15750000 {
                        compatible = "samsung,exynos7-dw-mshc";
-                       interrupts = <0 202 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0x15750000 0x2000>;
 
                mmc_2: mmc@15560000 {
                        compatible = "samsung,exynos7-dw-mshc-smu";
-                       interrupts = <0 216 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0x15560000 0x2000>;
                adc: adc@13620000 {
                        compatible = "samsung,exynos7-adc";
                        reg = <0x13620000 0x100>;
-                       interrupts = <0 448 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_peric0 PCLK_ADCIF>;
                        clock-names = "adc";
                        #io-channel-cells = <1>;
                tmuctrl_0: tmu@10060000 {
                        compatible = "samsung,exynos7-tmu";
                        reg = <0x10060000 0x200>;
-                       interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clock_peris PCLK_TMU>,
                                 <&clock_peris SCLK_TMU>;
                        clock-names = "tmu_apbif", "tmu_sclk";