ARM: S3C2443: Accommodate cpufreq frequency scheme in armdiv

Cpufreq uses frequencies in kHz and not Hz, so set_rate and round_rate
would be called with a frequency of 266666000 instead of 266666666 but
the clock functions check for rates smaller or equal to the targetrate.

As the armdiv does not support steps this small we can accommodate
this by simply also setting the last 3 digits of the calculated rate
to zero.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c
index 31f97f1bb36359d65d663b49757d32ef5c562847..40a87206400f2f0da4db9b71433b812e5f4b46d9 100644 (file)
--- a/arch/arm/plat-s3c24xx/s3c2443-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c
@@ -185,7 +185,8 @@ static unsigned long s3c2443_armclk_roundrate(struct clk *clk,
        for (ptr = 0; ptr < nr_armdiv; ptr++) {
                div = armdiv[ptr];
                if (div) {
-                       calc = parent / div;
+                       /* cpufreq provides 266mhz as 266666000 not 266666666 */
+                       calc = (parent / div / 1000) * 1000;
                        if (calc <= rate && div < best)
                                best = div;
                }
@@ -225,7 +226,8 @@ static int s3c2443_armclk_setrate(struct clk *clk, unsigned long rate)
        for (ptr = 0; ptr < nr_armdiv; ptr++) {
                div = armdiv[ptr];
                if (div) {
-                       calc = parent / div;
+                       /* cpufreq provides 266mhz as 266666000 not 266666666 */
+                       calc = (parent / div / 1000) * 1000;
                        if (calc <= rate && div < best) {
                                best = div;
                                val = ptr;