phy: sun4i-usb: add PHYCTL offset for H3 SoC

The config structure of H3 in phy-sun4i-usb driver have the PHYCTL
register offset missing.

Add it. From the BSP source code, we know that the offset should be
0x10.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

diff --git a/drivers/phy/phy-sun4i-usb.c b/drivers/phy/phy-sun4i-usb.c
index 62b4d25448c68f1b8f8f0ea47c2caca27d6ad15f..a650f283f6ff3303787bb61227b277c1e75906fa 100644 (file)
--- a/drivers/phy/phy-sun4i-usb.c
+++ b/drivers/phy/phy-sun4i-usb.c
@@ -821,6 +821,7 @@ static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
        .num_phys = 4,
        .type = sun8i_h3_phy,
        .disc_thresh = 3,
+       .phyctl_offset = REG_PHYCTL_A33,
        .dedicated_clocks = true,
        .enable_pmu_unk1 = true,
 };