crcpoly &= 0x3F;
/* OR in the new bit into our 64 bit mask. */
- adapter->mcastmask |= (u64) 1 << crcpoly;
+ adapter->mcastmask |= (u64)1 << crcpoly;
}
static void slic_mcast_set_mask(struct adapter *adapter)
u32 value2;
__iomem struct slic_regs *slic_regs = adapter->slic_regs;
- value = ntohl(*(__be32 *) &adapter->currmacaddr[2]);
+ value = ntohl(*(__be32 *)&adapter->currmacaddr[2]);
slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
- value2 = (u32) ((adapter->currmacaddr[0] << 8 |
+ value2 = (u32)((adapter->currmacaddr[0] << 8 |
adapter->currmacaddr[1]) & 0xFFFF);
slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
#else
slic_upr_queue_request(adapter,
SLIC_UPR_RLSR,
- (u32) &pshmem->linkstatus,
+ (u32)&pshmem->linkstatus,
SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
#endif
return;
case SLIC_UPR_STATS:
{
struct slic_stats *slicstats =
- (struct slic_stats *) &adapter->pshmem->inicstats;
+ (struct slic_stats *)&adapter->pshmem->inicstats;
struct slic_stats *newstats = slicstats;
struct slic_stats *old = &adapter->inicstats_prev;
struct slicnet_stats *stst = &adapter->slic_stats;
}
if (len > 0)
- checksum += *(u8 *) wp;
+ checksum += *(u8 *)wp;
while (checksum >> 16)
checksum = (checksum & 0xFFFF) + ((checksum >> 16) & 0xFFFF);
if (cmdqmem->pages[i]) {
pci_free_consistent(adapter->pcidev,
PAGE_SIZE,
- (void *) cmdqmem->pages[i],
+ (void *)cmdqmem->pages[i],
cmdqmem->dma_pages[i]);
}
}
adapter->pfree_slic_handles = pslic_handle->next;
spin_unlock_irqrestore(&adapter->handle_lock, flags);
pslic_handle->type = SLIC_HANDLE_CMD;
- pslic_handle->address = (void *) cmd;
- pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
+ pslic_handle->address = (void *)cmd;
+ pslic_handle->offset = (ushort)adapter->slic_handle_ix++;
pslic_handle->other_handle = NULL;
pslic_handle->next = NULL;
0, 0);
#else
status = slic_upr_request(adapter, SLIC_UPR_RLSR,
- (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
+ (u32)&pshmem->linkstatus, /* no 4GB wrap guaranteed */
0, 0, 0);
#endif
return status;
struct netdev_hw_addr *ha;
netdev_for_each_mc_addr(ha, dev) {
- addresses = (char *) &ha->addr;
+ addresses = (char *)&ha->addr;
status = slic_mcast_add_list(adapter, addresses);
if (status != 0)
break;
ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
ihcmd->u.slic_buffers.bufs[0].length = skb->len;
#if BITS_PER_LONG == 64
- hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
- (u64) hcmd) + 31) >> 5);
+ hcmd->cmdsize = (u32)((((u64)&ihcmd->u.slic_buffers.bufs[1] -
+ (u64)hcmd) + 31) >> 5);
#else
hcmd->cmdsize = (((u32)&ihcmd->u.slic_buffers.bufs[1] -
(u32)hcmd) + 31) >> 5;
/* Oasis card */
case SLIC_2GB_DEVICE_ID:
/* extract EEPROM data and pointers to EEPROM data */
- pOeeprom = (struct oslic_eeprom *) peeprom;
+ pOeeprom = (struct oslic_eeprom *)peeprom;
eecodesize = pOeeprom->EecodeSize;
dramsize = pOeeprom->DramSize;
pmac = pOeeprom->MacInfo;
(eecodesize >= MIN_EECODE_SIZE)) {
ee_chksum =
- *(u16 *) ((char *) peeprom + (eecodesize - 2));
+ *(u16 *)((char *)peeprom + (eecodesize - 2));
/*
calculate the EEPROM checksum
*/
}
hostid_reg =
- (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
+ (u16 __iomem *)(((u8 __iomem *)(adapter->slic_regs)) +
rdhostid_offset);
/* read the 16 bit hostid from SRAM */
- card_hostid = (ushort) readw(hostid_reg);
+ card_hostid = (ushort)readw(hostid_reg);
/* Initialize a new card structure if need be */
if (card_hostid == SLIC_HOSTID_DEFAULT) {
slic_adapter_set_hwaddr(adapter);
- netdev->base_addr = (unsigned long) memmapped_ioaddr;
+ netdev->base_addr = (unsigned long)memmapped_ioaddr;
netdev->irq = adapter->irq;
netdev->netdev_ops = &slic_netdev_ops;