mfd: palmas: Reset the POWERHOLD mux during power off
authorKeerthy <j-keerthy@ti.com>
Thu, 10 Nov 2016 05:09:18 +0000 (10:39 +0530)
committerLee Jones <lee.jones@linaro.org>
Thu, 27 Apr 2017 08:25:05 +0000 (09:25 +0100)
POWERHOLD signal has higher priority  over the DEV_ON bit.
So power off will not happen if the POWERHOLD is held high.
Hence reset the MUX to GPIO_7 mode to release the POWERHOLD
and the DEV_ON bit to take effect to power off the PMIC.

PMIC Power off happens in dire situations like thermal shutdown
so irrespective of the POWERHOLD setting go ahead and turn off
the powerhold.  Currently poweroff is broken on boards that have
powerhold enabled. This fixes poweroff on those boards.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
drivers/mfd/palmas.c

index ee9e9ea104447a47c7fd222a61e9f78d098bc121..f0c559d9fa4345d5f4cf279abaf943256bbcaeb0 100644 (file)
@@ -430,6 +430,20 @@ static void palmas_power_off(void)
 {
        unsigned int addr;
        int ret, slave;
+       struct device_node *np = palmas_dev->dev->of_node;
+
+       if (of_property_read_bool(np, "ti,palmas-override-powerhold")) {
+               addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
+                                         PALMAS_PRIMARY_SECONDARY_PAD2);
+               slave = PALMAS_BASE_TO_SLAVE(PALMAS_PU_PD_OD_BASE);
+
+               ret = regmap_update_bits(palmas_dev->regmap[slave], addr,
+                               PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK, 0);
+               if (ret)
+                       dev_err(palmas_dev->dev,
+                               "Unable to write PRIMARY_SECONDARY_PAD2 %d\n",
+                               ret);
+       }
 
        slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE);
        addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_DEV_CTRL);