b43: move MAC PHY clock controling function
authorRafał Miłecki <zajec5@gmail.com>
Tue, 10 May 2011 14:05:33 +0000 (16:05 +0200)
committerJohn W. Linville <linville@tuxdriver.com>
Wed, 11 May 2011 18:50:39 +0000 (14:50 -0400)
This is not N-PHY specific function, we partially duplicate code.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/b43/main.c
drivers/net/wireless/b43/main.h
drivers/net/wireless/b43/phy_n.c

index f7582c096f8d647775fce4524f75570bce15b904..1e6a2add2aafece98735fc4c205c1299cac17919 100644 (file)
@@ -2685,6 +2685,17 @@ out:
        dev->mac_suspended++;
 }
 
+/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MacPhyClkSet */
+void b43_mac_phy_clock_set(struct b43_wldev *dev, bool on)
+{
+       u32 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
+       if (on)
+               tmslow |= B43_TMSLOW_MACPHYCLKEN;
+       else
+               tmslow &= ~B43_TMSLOW_MACPHYCLKEN;
+       ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
+}
+
 static void b43_adjust_opmode(struct b43_wldev *dev)
 {
        struct b43_wl *wl = dev->wl;
@@ -2841,7 +2852,7 @@ static int b43_chip_init(struct b43_wldev *dev)
 {
        struct b43_phy *phy = &dev->phy;
        int err;
-       u32 value32, macctl;
+       u32 macctl;
        u16 value16;
 
        /* Initialize the MAC control */
@@ -2919,9 +2930,7 @@ static int b43_chip_init(struct b43_wldev *dev)
        b43_write32(dev, B43_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
        b43_write32(dev, B43_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
 
-       value32 = ssb_read32(dev->dev, SSB_TMSLOW);
-       value32 |= 0x00100000;
-       ssb_write32(dev->dev, SSB_TMSLOW, value32);
+       b43_mac_phy_clock_set(dev, true);
 
        b43_write16(dev, B43_MMIO_POWERUP_DELAY,
                    dev->dev->bus->chipco.fast_pwrup_delay);
index 40db03678d9f68e65ba55ccf6f07fcaf21db5c6f..a0d327f1318356029bcca97e40926f4a4aa32243 100644 (file)
@@ -133,6 +133,7 @@ void b43_power_saving_ctl_bits(struct b43_wldev *dev, unsigned int ps_flags);
 
 void b43_mac_suspend(struct b43_wldev *dev);
 void b43_mac_enable(struct b43_wldev *dev);
+void b43_mac_phy_clock_set(struct b43_wldev *dev, bool on);
 
 
 struct b43_request_fw_context;
index 6755063f955a5dea5e8cba38e7487178cef29658..b075a3f82a43377e9c22a8f54bd4c43854e0c168 100644 (file)
@@ -3540,17 +3540,6 @@ static int b43_nphy_cal_rx_iq(struct b43_wldev *dev,
                return b43_nphy_rev2_cal_rx_iq(dev, target, type, debug);
 }
 
-/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MacPhyClkSet */
-static void b43_nphy_mac_phy_clock_set(struct b43_wldev *dev, bool on)
-{
-       u32 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
-       if (on)
-               tmslow |= B43_TMSLOW_MACPHYCLKEN;
-       else
-               tmslow &= ~B43_TMSLOW_MACPHYCLKEN;
-       ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
-}
-
 /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCoreSetState */
 static void b43_nphy_set_rx_core_state(struct b43_wldev *dev, u8 mask)
 {
@@ -3691,7 +3680,7 @@ int b43_phy_initn(struct b43_wldev *dev)
        b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA);
        b43_nphy_bmac_clock_fgc(dev, 0);
 
-       b43_nphy_mac_phy_clock_set(dev, true);
+       b43_mac_phy_clock_set(dev, true);
 
        b43_nphy_pa_override(dev, false);
        b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);