drm/amd/powerplay: Fix enum mismatch

commit 42b5122e828a6ccd9952ad3116343dc032d33efe upstream.

In several locations the driver uses AMD_CG_STATE_UNGATE (type enum
amd_clockgating_state) instead of AMD_PG_STATE_UNGATE (type enum
amd_powergating_stat) and vice versa. Both constants have the same
value, so this doesn't cause any problems, but we still want to pass
the correct type.

Fixing the mismatch resolves multiple warnings like this when building
with clang:

drivers/gpu/drm/amd/amdgpu/../powerplay/hwmgr/cz_clockpowergating.c:169:7:
  error: implicit conversion from enumeration type 'enum
  amd_powergating_state' to different enumeration type 'enum
  amd_clockgating_state' [-Werror,-Wenum-conversion]
    AMD_PG_STATE_UNGATE);

Reviewed-by: Guenter Roeck <groeck@chromium.org>
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
index b33935fcf42838b190357336e799529db1e0da88..e6c6994e74badb4c043ac548ed83925c83fe868e 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/cz_clockpowergating.c
@@ -176,10 +176,10 @@ int cz_dpm_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
                cz_dpm_powerup_uvd(hwmgr);
                cgs_set_clockgating_state(hwmgr->device,
                                                AMD_IP_BLOCK_TYPE_UVD,
-                                               AMD_PG_STATE_UNGATE);
+                                               AMD_CG_STATE_UNGATE);
                cgs_set_powergating_state(hwmgr->device,
                                                AMD_IP_BLOCK_TYPE_UVD,
-                                               AMD_CG_STATE_UNGATE);
+                                               AMD_PG_STATE_UNGATE);
                cz_dpm_update_uvd_dpm(hwmgr, false);
        }
 
@@ -208,11 +208,11 @@ int cz_dpm_powergate_vce(struct pp_hwmgr *hwmgr, bool bgate)
                cgs_set_clockgating_state(
                                        hwmgr->device,
                                        AMD_IP_BLOCK_TYPE_VCE,
-                                       AMD_PG_STATE_UNGATE);
+                                       AMD_CG_STATE_UNGATE);
                cgs_set_powergating_state(
                                        hwmgr->device,
                                        AMD_IP_BLOCK_TYPE_VCE,
-                                       AMD_CG_STATE_UNGATE);
+                                       AMD_PG_STATE_UNGATE);
                cz_dpm_update_vce_dpm(hwmgr);
                cz_enable_disable_vce_dpm(hwmgr, true);
                return 0;

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
index 261b828ad59086990f9f054906448a5526f4cbc4..2f3509be226f205a5f7234640e40bbb1ab93fbfb 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_clockpowergating.c
@@ -162,7 +162,7 @@ int smu7_powergate_uvd(struct pp_hwmgr *hwmgr, bool bgate)
                                AMD_CG_STATE_UNGATE);
                cgs_set_powergating_state(hwmgr->device,
                                                AMD_IP_BLOCK_TYPE_UVD,
-                                               AMD_CG_STATE_UNGATE);
+                                               AMD_PG_STATE_UNGATE);
                smu7_update_uvd_dpm(hwmgr, false);
        }