Some HW design may use ID pin state to control vbus for otg port,
so before host role start, the vbus is already turned on, in this
case, we do not need wait vbus dropping below BSV.
Signed-off-by: Li Jun <jun.li@freescale.com>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
ci_role(ci)->name, ci->roles[role]->name);
ci_role_stop(ci);
- /* wait vbus lower than OTGSC_BSV */
- hw_wait_reg(ci, OP_OTGSC, OTGSC_BSV, 0,
- CI_VBUS_STABLE_TIMEOUT_MS);
+
+ if (role == CI_ROLE_GADGET)
+ /* wait vbus lower than OTGSC_BSV */
+ hw_wait_reg(ci, OP_OTGSC, OTGSC_BSV, 0,
+ CI_VBUS_STABLE_TIMEOUT_MS);
+
ci_role_start(ci, role);
}
}